mirror of
https://github.com/checkpoint-restore/criu.git
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70833bcf29
Acked-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Adrian Reber <areber@redhat.com>
139 lines
2.7 KiB
C
139 lines
2.7 KiB
C
#ifndef __CR_ATOMIC_H__
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#define __CR_ATOMIC_H__
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/*
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* PowerPC atomic operations
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*
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* Copied from kernel header file arch/powerpc/include/asm/atomic.h
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*/
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typedef struct {
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int counter;
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} atomic_t;
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#include "common/arch/ppc64/asm/cmpxchg.h"
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#define PPC_ATOMIC_ENTRY_BARRIER "lwsync \n"
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#define PPC_ATOMIC_EXIT_BARRIER "sync \n"
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#define ATOMIC_INIT(i) \
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{ \
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(i) \
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}
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static __inline__ int atomic_read(const atomic_t *v)
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{
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int t;
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__asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter));
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return t;
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}
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static __inline__ void atomic_set(atomic_t *v, int i)
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{
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__asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i));
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}
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/* clang-format off */
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#define ATOMIC_OP(op, asm_op) \
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static __inline__ void atomic_##op(int a, atomic_t *v) \
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{ \
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int t; \
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\
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__asm__ __volatile__( \
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"1: lwarx %0,0,%3 # atomic_" #op "\n" \
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#asm_op " %0,%2,%0\n" \
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" stwcx. %0,0,%3 \n" \
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" bne- 1b\n" \
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: "=&r" (t), "+m" (v->counter) \
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: "r" (a), "r" (&v->counter) \
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: "cc"); \
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} \
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ATOMIC_OP(add, add)
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ATOMIC_OP(sub, subf)
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#undef ATOMIC_OP
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static __inline__ void atomic_inc(atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2 # atomic_inc\n\
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addic %0,%0,1\n"
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" stwcx. %0,0,%2 \n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc", "xer");
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}
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static __inline__ int atomic_inc_return(atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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PPC_ATOMIC_ENTRY_BARRIER \
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"1: lwarx %0,0,%1 # atomic_inc_return\n\
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addic %0,%0,1\n"
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" stwcx. %0,0,%1 \n\
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bne- 1b \n" \
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PPC_ATOMIC_EXIT_BARRIER
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: "=&r" (t)
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: "r" (&v->counter)
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: "cc", "xer", "memory");
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return t;
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}
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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static __inline__ void atomic_dec(atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2 # atomic_dec\n\
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addic %0,%0,-1\n"
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" stwcx. %0,0,%2\n\
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bne- 1b"
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc", "xer");
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}
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static __inline__ int atomic_sub_return(int a, atomic_t *v)
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{
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int t;
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__asm__ __volatile__(
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" \nLWSYNC\n"
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"1: lwarx %0,0,%2 # atomic_sub_return\n\
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subf %0,%1,%0\n"
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" stwcx. %0,0,%2 \n\
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bne- 1b"
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" \nsync\n"
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: "=&r" (t)
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: "r" (a), "r" (&v->counter)
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: "cc", "memory");
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return t;
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}
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/* clang-format on */
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/* true if the result is 0, or false for all other cases. */
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#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
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#define atomic_dec_return(v) (atomic_sub_return(1, v))
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#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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#endif /* __CR_ATOMIC_H__ */
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