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Supported machine architectures provide TLS stogares of different sizes: the size of the TLS storage in x86-64 is 24 bytes, ARM --- 4 bytes and upcoming AArch64 --- 8 bytes. This means every supported architecture needs a specific type to store the value of the TLS register. This patch reworks the insterface of the routines arch_get_tls() and restore_tls() passing them the TLS storage by pointer rather than by value to simplify the TLS stub for x86. Signed-off-by: Alexander Kartashov <alekskartashov@parallels.com> Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org> Reviewed-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Pavel Emelyanov <xemul@parallels.com>
14 lines
336 B
C
14 lines
336 B
C
#ifndef __CR_ASM_DUMP_H__
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#define __CR_ASM_DUMP_H__
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extern int get_task_regs(pid_t pid, user_regs_struct_t regs, CoreEntry *core);
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extern int arch_alloc_thread_info(CoreEntry *core);
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extern void arch_free_thread_info(CoreEntry *core);
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static inline void core_put_tls(CoreEntry *core, tls_t tls)
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{
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core->ti_arm->tls = tls;
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}
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#endif
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