From f0fb0bc964f70bc4c890e294f0034d9609b466da Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Thu, 19 Jul 2018 15:47:31 +0300 Subject: [PATCH] x86: cpu -- Add image definitions for fpu frames Signed-off-by: Cyrill Gorcunov Reviewed-by: Dmitry Safonov <0x7f454c46@gmail.com> Signed-off-by: Andrei Vagin --- images/core-x86.proto | 21 +++++++++++++++++++++ images/cpuinfo.proto | 2 ++ 2 files changed, 23 insertions(+) diff --git a/images/core-x86.proto b/images/core-x86.proto index d4b791dbc..2ed2ad35d 100644 --- a/images/core-x86.proto +++ b/images/core-x86.proto @@ -40,8 +40,29 @@ message user_x86_regs_entry { } message user_x86_xsave_entry { + /* standart xsave features */ required uint64 xstate_bv = 1; + + /* AVX components: 16x 256-bit ymm registers, hi 128 bits */ repeated uint32 ymmh_space = 2; + + /* MPX components */ + repeated uint64 bndreg_state = 3; + repeated uint64 bndcsr_state = 4; + + /* AVX512 components: k0-k7, ZMM_Hi256, Hi16_ZMM */ + repeated uint64 opmask_reg = 5; + repeated uint64 zmm_upper = 6; + repeated uint64 hi16_zmm = 7; + + /* Protected keys */ + repeated uint32 pkru = 8; + + /* + * Processor trace (PT) and hardware duty cycling (HDC) + * are supervisor state components and only managed by + * xsaves/xrstors on cpl=0, so ignore them. + */ } message user_x86_fpregs_entry { diff --git a/images/cpuinfo.proto b/images/cpuinfo.proto index a8cb8de34..b399503bd 100644 --- a/images/cpuinfo.proto +++ b/images/cpuinfo.proto @@ -15,6 +15,8 @@ message cpuinfo_x86_entry { repeated uint32 capability = 6; optional string model_id = 7; + + optional uint64 xfeatures_mask = 8; } message cpuinfo_ppc64_entry {