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s390: Add test case for RI
- Add new test "s390x_runtime_instr" to check if the RI control block is correctly restored when the RI is active. - Add RI control block in test s390x_regs_check.c The original test case for RI has been provided by Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Alice Frosi <alice@linux.vnet.ibm.com> Reviewed-by: Michael Holzheu <holzheu@linux.vnet.ibm.com> Signed-off-by: Andrei Vagin <avagin@virtuozzo.com>
This commit is contained in:
Alice Frosi
Andrei Vagin
parent
581f731ba6
commit
865f099d70
3 changed files with 245 additions and 1 deletions
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@ -188,7 +188,8 @@ endif
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ifeq ($(SRCARCH),s390)
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TST_NOFILE += s390x_regs_check \
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s390x_gs_threads
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s390x_gs_threads \
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s390x_runtime_instr
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endif
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TST_FILE = \
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@ -226,6 +226,36 @@ struct reg_set reg_set_gs_bc = {
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.optional = true,
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};
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/*
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* s390 runtime-instrumentation control block
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*/
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#define NT_S390_RI_CB 0x30d
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struct ri_cb {
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uint64_t regs[8];
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};
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struct ri_cb ri_cb_data = {
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.regs = {
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0x000002aa13aae000,
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0x000002aa13aad000,
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0x000002aa13aadfff,
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0xe0a1000400000000,
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0x0000000000000000,
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0x0000000000004e20,
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0x0000000000003479,
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0x0000000000000000,
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}
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};
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struct reg_set reg_set_ri_cb = {
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.name = "RI_CB",
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.nr = NT_S390_RI_CB,
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.data = &ri_cb_data,
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.len = sizeof(ri_cb_data),
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.optional = true,
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};
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/*
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* Vector with all regsets
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*/
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@ -235,6 +265,7 @@ struct reg_set *reg_set_vec[] = {
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®_set_vxrs_high,
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®_set_gs_cb,
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®_set_gs_bc,
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®_set_ri_cb,
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NULL,
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};
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212
test/zdtm/static/s390x_runtime_instr.c
Normal file
212
test/zdtm/static/s390x_runtime_instr.c
Normal file
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@ -0,0 +1,212 @@
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#include <stdio.h>
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#include <unistd.h>
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#include <signal.h>
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#include <sys/types.h>
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#include <unistd.h>
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#include <sys/syscall.h>
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#include <errno.h>
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#include <sys/ptrace.h>
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#include <stdlib.h>
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#include <sys/uio.h>
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#include <asm/ptrace.h>
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#include <linux/elf.h>
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#include <sys/wait.h>
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#include <stdlib.h>
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#include <ucontext.h>
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#include <signal.h>
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#include <string.h>
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#include "zdtmtst.h"
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#ifndef __NR_s390_runtime_instr
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#define __NR_s390_runtime_instr 342
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#endif
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#define NT_S390_RI_CB 0x30d
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#define BUF_SIZE (1024*1024)
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const char *test_doc = "Check runtime-instrumentation";
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/* Original test provided by Martin Schwidefsky <schwidefsky@de.ibm.com> */
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const char *test_author = "Alice Frosi <alice@linux.vnet.ibm.com>";
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struct runtime_instr_cb {
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unsigned long rca;
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unsigned long roa;
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unsigned long rla;
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unsigned int v : 1;
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unsigned int s : 1;
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unsigned int k : 1;
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unsigned int h : 1;
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unsigned int a : 1;
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unsigned int reserved1 : 3;
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unsigned int ps : 1;
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unsigned int qs : 1;
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unsigned int pc : 1;
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unsigned int qc : 1;
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unsigned int reserved2 : 1;
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unsigned int g : 1;
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unsigned int u : 1;
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unsigned int l : 1;
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unsigned int key : 4;
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unsigned int reserved3 : 8;
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unsigned int t : 1;
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unsigned int rgs : 3;
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unsigned int m : 4;
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unsigned int n : 1;
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unsigned int mae : 1;
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unsigned int reserved4 : 2;
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unsigned int c : 1;
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unsigned int r : 1;
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unsigned int b : 1;
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unsigned int j : 1;
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unsigned int e : 1;
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unsigned int x : 1;
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unsigned int reserved5 : 2;
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unsigned int bpxn : 1;
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unsigned int bpxt : 1;
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unsigned int bpti : 1;
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unsigned int bpni : 1;
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unsigned int reserved6 : 2;
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unsigned int d : 1;
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unsigned int f : 1;
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unsigned int ic : 4;
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unsigned int dc : 4;
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unsigned long reserved7;
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unsigned long sf;
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unsigned long rsic;
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unsigned long reserved8;
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};
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/*
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* Return PSW mask
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*/
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static inline unsigned long extract_psw(void)
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{
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unsigned int reg1, reg2;
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asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
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return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
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}
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/*
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* Enable runtime-instrumentation
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*/
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static inline void rion(void)
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{
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asm volatile (".word 0xaa01, 0x0000");
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}
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/*
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* Disable runtime-instrumentation
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*/
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static inline void rioff(void)
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{
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asm volatile (".word 0xaa03, 0x0000");
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}
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/*
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* Modify the current runtime-instrumentation control block
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*/
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static inline void mric(struct runtime_instr_cb *cb)
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{
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asm volatile(".insn rsy,0xeb0000000062,0,0,%0" : : "Q" (*cb));
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}
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/*
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* Store the current runtime-instrumentation control block
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*/
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static inline void stric(struct runtime_instr_cb *cb)
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{
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asm volatile(".insn rsy,0xeb0000000061,0,0,%0" : "=Q" (*cb) : : "cc");
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}
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/*
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* Ensure that runtime-intstrumentation is still working after C/R
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*/
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int main(int argc, char **argv)
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{
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struct runtime_instr_cb ricb, ricb_check;
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unsigned long *ricb_check_ptr = (unsigned long *) &ricb_check;
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unsigned long *ricb_ptr = (unsigned long *) &ricb;
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unsigned long psw_mask;
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void *buf;
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int i;
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test_init(argc, argv);
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buf = malloc(BUF_SIZE);
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memset(buf, 0, BUF_SIZE);
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memset(&ricb, 0, sizeof(ricb));
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/* Initialize the default RI control block in the kernel */
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if (syscall(__NR_s390_runtime_instr, 1, NULL) < 0) {
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if (errno == EOPNOTSUPP) {
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test_daemon();
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test_waitsig();
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skip("RI not supported");
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pass();
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return 0;
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}
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fail("Fail with error %d", errno);
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return -1;
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}
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/* Set buffer for RI */
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ricb.rca = ricb.roa = (unsigned long) buf;
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ricb.rla = (unsigned long) buf + BUF_SIZE;
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mric(&ricb);
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/* Enable RI - afterwards the PSW will have RI bit set */
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rion();
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psw_mask = extract_psw();
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/* Verify that the RI bit is set in the PSW */
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if (!(psw_mask & PSW_MASK_RI)) {
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fail("Failed to enable RI");
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return -1;
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}
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/* Collect RI records until we hit buffer-full condition */
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while (ricb.rca < ricb.rla + 1) {
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for (i = 0; i < 10000; i++)
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asm volatile("" : : : "memory");
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rioff();
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stric(&ricb);
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rion();
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}
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/* Disable RI */
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rioff();
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/* Save the current RI control block */
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stric(&ricb);
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ricb_check = ricb;
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/* Re-enable RI for checkpoint */
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rion();
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/* Do C/R now */
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test_daemon();
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test_waitsig();
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/* Verify that the RI bit is set in the PSW */
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psw_mask = extract_psw();
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if (!(psw_mask & PSW_MASK_RI)) {
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fail("RI bit in PSW not set");
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return -1;
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}
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/*
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* Verify that the RI block has been restored correctly
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* and the buffer is unchanged
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*/
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rioff();
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stric(&ricb);
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for (i = 0; i < 8; i++) {
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if (ricb_ptr[i] == ricb_check_ptr[i])
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continue;
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/* Skip sf field because its value may change */
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if (i == 6)
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continue;
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fail("%d:Got %016lx expected %016lx",
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i, ricb_ptr[i], ricb_check_ptr[i]);
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return -1;
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}
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pass();
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return 0;
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}
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