From 7ddf8d6dc930bf2e92a3e3641f5ed0bfec5edb45 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Thu, 14 Jun 2018 20:27:23 +0300 Subject: [PATCH] x86: cpu -- Add new instruction bits to check Reviewed-by: Dmitry Safonov <0x7f454c46@gmail.com> Signed-off-by: Cyrill Gorcunov Signed-off-by: Andrei Vagin --- criu/arch/x86/cpu.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/criu/arch/x86/cpu.c b/criu/arch/x86/cpu.c index bcf80778a..b065a1f92 100644 --- a/criu/arch/x86/cpu.c +++ b/criu/arch/x86/cpu.c @@ -168,8 +168,26 @@ static u32 x86_ins_capability_mask[NCAPINTS] = { [CPUID_D_1_EAX] = __ins_bit(CPUID_D_1_EAX, X86_FEATURE_XSAVEOPT) | __ins_bit(CPUID_D_1_EAX, X86_FEATURE_XSAVEC) | - __ins_bit(CPUID_D_1_EAX, X86_FEATURE_XGETBV1) | - __ins_bit(CPUID_D_1_EAX, X86_FEATURE_XSAVES), + __ins_bit(CPUID_D_1_EAX, X86_FEATURE_XGETBV1), + + [CPUID_7_0_ECX] = + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512VBMI) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512_VBMI2) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_GFNI) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_VAES) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_VPCLMULQDQ) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512_VNNI) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512_BITALG) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_TME) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512_VPOPCNTDQ) | + __ins_bit(CPUID_7_0_ECX, X86_FEATURE_RDPID), + + [CPUID_8000_0008_EBX] = + __ins_bit(CPUID_8000_0008_EBX, X86_FEATURE_CLZERO), + + [CPUID_7_0_EDX] = + __ins_bit(CPUID_7_0_EDX, X86_FEATURE_AVX512_4VNNIW) | + __ins_bit(CPUID_7_0_EDX, X86_FEATURE_AVX512_4FMAPS), }; #undef __ins_bit