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compel: add helpers to get/set instruction pointer

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Signed-off-by: Alexander Mikhalitsyn <alexander.mikhalitsyn@virtuozzo.com>
This commit is contained in:
Alexander Mikhalitsyn 2022-02-21 15:15:52 +03:00 • committed by Andrei Vagin
parent 441310c260
commit 4c7ece0bb7
14 changed files with 67 additions and 23 deletions
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9
compel/arch/aarch64/src/lib/include/uapi/asm/infect-types.h
View file

@ -23,10 +23,11 @@ typedef struct user_fpsimd_state user_fpregs_struct_t;
#define compel_arch_get_tls_task(ctl, tls)
#define compel_arch_get_tls_thread(tctl, tls)
#define REG_RES(r) ((uint64_t)(r).regs[0])
#define REG_IP(r) ((uint64_t)(r).pc)
#define REG_SP(r) ((uint64_t)((r).sp))
#define REG_SYSCALL_NR(r) ((uint64_t)(r).regs[8])
#define REG_RES(r) ((uint64_t)(r).regs[0])
#define REG_IP(r) ((uint64_t)(r).pc)
#define SET_REG_IP(r, val) ((r).pc = (val))
#define REG_SP(r) ((uint64_t)((r).sp))
#define REG_SYSCALL_NR(r) ((uint64_t)(r).regs[8])
#define user_regs_native(pregs) true

9
compel/arch/arm/src/lib/include/uapi/asm/infect-types.h
View file

@ -56,10 +56,11 @@ struct user_vfp_exc {
unsigned long fpinst2;
};
#define REG_RES(regs) ((regs).ARM_r0)
#define REG_IP(regs) ((regs).ARM_pc)
#define REG_SP(regs) ((regs).ARM_sp)
#define REG_SYSCALL_NR(regs) ((regs).ARM_r7)
#define REG_RES(regs) ((regs).ARM_r0)
#define REG_IP(regs) ((regs).ARM_pc)
#define SET_REG_IP(regs, val) ((regs).ARM_pc = (val))
#define REG_SP(regs) ((regs).ARM_sp)
#define REG_SYSCALL_NR(regs) ((regs).ARM_r7)
#define user_regs_native(pregs) true

9
compel/arch/mips/src/lib/include/uapi/asm/infect-types.h
View file

@ -56,10 +56,11 @@ static inline bool user_regs_native(user_regs_struct_t *pregs)
#define compel_arch_get_tls_task(ctl, tls)
#define compel_arch_get_tls_thread(tctl, tls)
#define REG_RES(regs) ((regs).MIPS_v0)
#define REG_IP(regs) ((regs).cp0_epc)
#define REG_SP(regs) ((regs).MIPS_sp)
#define REG_SYSCALL_NR(regs) ((regs).MIPS_v0)
#define REG_RES(regs) ((regs).MIPS_v0)
#define REG_IP(regs) ((regs).cp0_epc)
#define SET_REG_IP(regs, val) ((regs).cp0_epc = (val))
#define REG_SP(regs) ((regs).MIPS_sp)
#define REG_SYSCALL_NR(regs) ((regs).MIPS_v0)
//#define __NR(syscall, compat) ((compat) ? __NR32_##syscall : __NR_##syscall)
#define __NR(syscall, compat) __NR_##syscall

9
compel/arch/ppc64/src/lib/include/uapi/asm/infect-types.h
View file

@ -72,10 +72,11 @@ typedef struct {
} tm;
} user_fpregs_struct_t;
#define REG_RES(regs) ((uint64_t)(regs).gpr[3])
#define REG_IP(regs) ((uint64_t)(regs).nip)
#define REG_SP(regs) ((uint64_t)(regs).gpr[1])
#define REG_SYSCALL_NR(regs) ((uint64_t)(regs).gpr[0])
#define REG_RES(regs) ((uint64_t)(regs).gpr[3])
#define REG_IP(regs) ((uint64_t)(regs).nip)
#define SET_REG_IP(regs, val) ((regs).nip = (val))
#define REG_SP(regs) ((uint64_t)(regs).gpr[1])
#define REG_SYSCALL_NR(regs) ((uint64_t)(regs).gpr[0])
#define user_regs_native(pregs) true

7
compel/arch/s390/src/lib/include/uapi/asm/infect-types.h
View file

@ -62,9 +62,10 @@ typedef struct {
uint32_t system_call;
} user_regs_struct_t;
#define REG_RES(r) ((uint64_t)(r).prstatus.gprs[2])
#define REG_IP(r) ((uint64_t)(r).prstatus.psw.addr)
#define REG_SP(r) ((uint64_t)(r).prstatus.gprs[15])
#define REG_RES(r) ((uint64_t)(r).prstatus.gprs[2])
#define REG_IP(r) ((uint64_t)(r).prstatus.psw.addr)
#define SET_REG_IP(r, val) ((r).prstatus.psw.addr = (val))
#define REG_SP(r) ((uint64_t)(r).prstatus.gprs[15])
/*
* We assume that REG_SYSCALL_NR() is only used for pie code where we
* always use svc 0 with opcode in %r1.

9
compel/arch/x86/src/lib/include/uapi/asm/infect-types.h
View file

@ -127,10 +127,11 @@ typedef struct {
typedef struct xsave_struct user_fpregs_struct_t;
#define REG_RES(regs) get_user_reg(&regs, ax)
#define REG_IP(regs) get_user_reg(&regs, ip)
#define REG_SP(regs) get_user_reg(&regs, sp)
#define REG_SYSCALL_NR(regs) get_user_reg(&regs, orig_ax)
#define REG_RES(regs) get_user_reg(&regs, ax)
#define REG_IP(regs) get_user_reg(&regs, ip)
#define SET_REG_IP(regs, val) set_user_reg(&regs, ip, val)
#define REG_SP(regs) get_user_reg(&regs, sp)
#define REG_SYSCALL_NR(regs) get_user_reg(&regs, orig_ax)
#define __NR(syscall, compat) ((compat) ? __NR32_##syscall : __NR_##syscall)

6
compel/include/uapi/infect.h
View file

@ -168,4 +168,10 @@ extern unsigned long compel_task_size(void);
extern uint64_t compel_get_leader_sp(struct parasite_ctl *ctl);
extern uint64_t compel_get_thread_sp(struct parasite_thread_ctl *tctl);
extern uint64_t compel_get_leader_ip(struct parasite_ctl *ctl);
extern uint64_t compel_get_thread_ip(struct parasite_thread_ctl *tctl);
void compel_set_leader_ip(struct parasite_ctl *ctl, uint64_t v);
void compel_set_thread_ip(struct parasite_thread_ctl *tctl, uint64_t v);
#endif

20
compel/src/lib/infect.c
View file

@ -1687,3 +1687,23 @@ uint64_t compel_get_thread_sp(struct parasite_thread_ctl *tctl)
{
return REG_SP(tctl->th.regs);
}
uint64_t compel_get_leader_ip(struct parasite_ctl *ctl)
{
return REG_IP(ctl->orig.regs);
}
uint64_t compel_get_thread_ip(struct parasite_thread_ctl *tctl)
{
return REG_IP(tctl->th.regs);
}
void compel_set_leader_ip(struct parasite_ctl *ctl, uint64_t v)
{
SET_REG_IP(ctl->orig.regs, v);
}
void compel_set_thread_ip(struct parasite_thread_ctl *tctl, uint64_t v)
{
SET_REG_IP(tctl->th.regs, v);
}

2
criu/arch/aarch64/include/asm/types.h
View file

@ -22,6 +22,8 @@ typedef UserAarch64RegsEntry UserRegsEntry;
#define TI_SP(core) ((core)->ti_aarch64->gpregs->sp)
#define TI_IP(core) ((core)->ti_aarch64->gpregs->pc)
static inline void *decode_pointer(uint64_t v)
{
return (void *)v;

2
criu/arch/arm/include/asm/types.h
View file

@ -21,6 +21,8 @@ typedef UserArmRegsEntry UserRegsEntry;
#define TI_SP(core) ((core)->ti_arm->gpregs->sp)
#define TI_IP(core) ((core)->ti_arm->gpregs->ip)
static inline void *decode_pointer(u64 v)
{
return (void *)(u32)v;

2
criu/arch/mips/include/asm/types.h
View file

@ -18,6 +18,8 @@
#define CORE_THREAD_ARCH_INFO(core) core->ti_mips
#define TI_IP(core) ((core)->ti_mips->gpregs->cp0_epc)
typedef UserMipsRegsEntry UserRegsEntry;
static inline u64 encode_pointer(void *p)

2
criu/arch/ppc64/include/asm/types.h
View file

@ -19,6 +19,8 @@ typedef UserPpc64RegsEntry UserRegsEntry;
#define CORE_THREAD_ARCH_INFO(core) core->ti_ppc64
#define TI_IP(core) ((core)->ti_ppc64->gpregs->nip)
static inline void *decode_pointer(uint64_t v)
{
return (void *)v;

2
criu/arch/s390/include/asm/types.h
View file

@ -19,6 +19,8 @@ typedef UserS390RegsEntry UserRegsEntry;
#define CORE_THREAD_ARCH_INFO(core) core->ti_s390
#define TI_IP(core) ((core)->ti_s390->gpregs->psw_addr)
static inline u64 encode_pointer(void *p)
{
return (u64)p;

2
criu/arch/x86/include/asm/types.h
View file

@ -28,6 +28,8 @@ static inline int core_is_compat(CoreEntry *c)
#define CORE_THREAD_ARCH_INFO(core) core->thread_info
#define TI_IP(core) ((core)->thread_info->gpregs->ip)
typedef UserX86RegsEntry UserRegsEntry;
static inline u64 encode_pointer(void *p)