Mirrors/criu
1
0
Fork 0
mirror of https://github.com/checkpoint-restore/criu.git synced 2026-01-23 02:14:37 +00:00
Code Issues Projects Releases Wiki Activity

Convert spaces to tabs

Browse source 
There are a few places where spaces have been used instead of tabs for
indentation. This patch converts the spaces to tabs for consistency
with the rest of the code base.

Signed-off-by: Radostin Stoyanov <rstoyanov1@gmail.com>
This commit is contained in:
Radostin Stoyanov 2019-04-12 21:01:36 +01:00 • committed by Andrei Vagin
parent 6d66dd5d89
commit 4662315fc4
30 changed files with 212 additions and 212 deletions
Download patch file Download diff file Expand all files Collapse all files

18
include/common/arch/arm/asm/atomic.h
View file

@ -29,9 +29,9 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
"teq %1, %4\n"
"it eq\n"
"strexeq %0, %5, [%3]\n"
: "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter)
: "r" (&ptr->counter), "Ir" (old), "r" (new)
: "cc");
: "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter)
: "r" (&ptr->counter), "Ir" (old), "r" (new)
: "cc");
} while (res);
smp_mb();
@ -47,13 +47,13 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
{
int ret;
int ret;
ret = v->counter;
if (ret == old)
v->counter = new;
ret = v->counter;
if (ret == old)
v->counter = new;
return ret;
return ret;
}
#else
@ -88,7 +88,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
" teq %1, #0\n"
" bne 1b\n"
: "=&r" (result), "=&r" (tmp), "+Qo" (v->counter)
: "r" (&v->counter), "Ir" (i)
: "r" (&v->counter), "Ir" (i)
: "cc");
smp_mb();

2
include/common/arch/ppc64/asm/atomic.h
View file

@ -8,7 +8,7 @@
*/
typedef struct {
int counter;
int counter;
} atomic_t;
#include "common/arch/ppc64/asm/cmpxchg.h"

64
include/common/arch/ppc64/asm/linkage.h
View file

@ -261,38 +261,38 @@
#define N_SLINE 68
#define N_SO 100
#define __REG_R0 0
#define __REG_R1 1
#define __REG_R2 2
#define __REG_R3 3
#define __REG_R4 4
#define __REG_R5 5
#define __REG_R6 6
#define __REG_R7 7
#define __REG_R8 8
#define __REG_R9 9
#define __REG_R10 10
#define __REG_R11 11
#define __REG_R12 12
#define __REG_R13 13
#define __REG_R14 14
#define __REG_R15 15
#define __REG_R16 16
#define __REG_R17 17
#define __REG_R18 18
#define __REG_R19 19
#define __REG_R20 20
#define __REG_R21 21
#define __REG_R22 22
#define __REG_R23 23
#define __REG_R24 24
#define __REG_R25 25
#define __REG_R26 26
#define __REG_R27 27
#define __REG_R28 28
#define __REG_R29 29
#define __REG_R30 30
#define __REG_R31 31
#define __REG_R0 0
#define __REG_R1 1
#define __REG_R2 2
#define __REG_R3 3
#define __REG_R4 4
#define __REG_R5 5
#define __REG_R6 6
#define __REG_R7 7
#define __REG_R8 8
#define __REG_R9 9
#define __REG_R10 10
#define __REG_R11 11
#define __REG_R12 12
#define __REG_R13 13
#define __REG_R14 14
#define __REG_R15 15
#define __REG_R16 16
#define __REG_R17 17
#define __REG_R18 18
#define __REG_R19 19
#define __REG_R20 20
#define __REG_R21 21
#define __REG_R22 22
#define __REG_R23 23
#define __REG_R24 24
#define __REG_R25 25
#define __REG_R26 26
#define __REG_R27 27
#define __REG_R28 28
#define __REG_R29 29
#define __REG_R30 30
#define __REG_R31 31

2
include/common/arch/x86/asm/cmpxchg.h
View file

@ -17,7 +17,7 @@
*/
#define __xchg_op(ptr, arg, op, lock) \
({ \
__typeof__ (*(ptr)) __ret = (arg); \
__typeof__ (*(ptr)) __ret = (arg); \
switch (sizeof(*(ptr))) { \
case __X86_CASE_B: \
asm volatile (lock #op "b %b0, %1\n" \