mirror of
https://github.com/checkpoint-restore/criu.git
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plugins/amdgpu: use C99-standard types
Co-developed-by: Andrei Vagin <avagin@gmail.com> Signed-off-by: Radostin Stoyanov <rstoyanov@fedoraproject.org>
This commit is contained in:
Radostin Stoyanov
Andrei Vagin
parent
d68205e919
commit
3e2ed18790
1 changed files with 175 additions and 175 deletions
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@ -39,8 +39,8 @@
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#define KFD_IOCTL_MINOR_VERSION 8
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struct kfd_ioctl_get_version_args {
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__u32 major_version; /* from KFD */
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__u32 minor_version; /* from KFD */
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uint32_t major_version; /* from KFD */
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uint32_t minor_version; /* from KFD */
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};
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/* For kfd_ioctl_create_queue_args.queue_type. */
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@ -53,51 +53,51 @@ struct kfd_ioctl_get_version_args {
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#define KFD_MAX_QUEUE_PRIORITY 15
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struct kfd_ioctl_create_queue_args {
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__u64 ring_base_address; /* to KFD */
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__u64 write_pointer_address; /* from KFD */
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__u64 read_pointer_address; /* from KFD */
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__u64 doorbell_offset; /* from KFD */
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uint64_t ring_base_address; /* to KFD */
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uint64_t write_pointer_address; /* from KFD */
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uint64_t read_pointer_address; /* from KFD */
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uint64_t doorbell_offset; /* from KFD */
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__u32 ring_size; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 queue_type; /* to KFD */
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__u32 queue_percentage; /* to KFD */
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__u32 queue_priority; /* to KFD */
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__u32 queue_id; /* from KFD */
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uint32_t ring_size; /* to KFD */
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uint32_t gpu_id; /* to KFD */
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uint32_t queue_type; /* to KFD */
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uint32_t queue_percentage; /* to KFD */
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uint32_t queue_priority; /* to KFD */
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uint32_t queue_id; /* from KFD */
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__u64 eop_buffer_address; /* to KFD */
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__u64 eop_buffer_size; /* to KFD */
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__u64 ctx_save_restore_address; /* to KFD */
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__u32 ctx_save_restore_size; /* to KFD */
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__u32 ctl_stack_size; /* to KFD */
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uint64_t eop_buffer_address; /* to KFD */
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uint64_t eop_buffer_size; /* to KFD */
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uint64_t ctx_save_restore_address; /* to KFD */
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uint32_t ctx_save_restore_size; /* to KFD */
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uint32_t ctl_stack_size; /* to KFD */
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};
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struct kfd_ioctl_destroy_queue_args {
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__u32 queue_id; /* to KFD */
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__u32 pad;
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uint32_t queue_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_ioctl_update_queue_args {
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__u64 ring_base_address; /* to KFD */
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uint64_t ring_base_address; /* to KFD */
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__u32 queue_id; /* to KFD */
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__u32 ring_size; /* to KFD */
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__u32 queue_percentage; /* to KFD */
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__u32 queue_priority; /* to KFD */
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uint32_t queue_id; /* to KFD */
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uint32_t ring_size; /* to KFD */
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uint32_t queue_percentage; /* to KFD */
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uint32_t queue_priority; /* to KFD */
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};
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struct kfd_ioctl_set_cu_mask_args {
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__u32 queue_id; /* to KFD */
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__u32 num_cu_mask; /* to KFD */
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__u64 cu_mask_ptr; /* to KFD */
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uint32_t queue_id; /* to KFD */
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uint32_t num_cu_mask; /* to KFD */
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uint64_t cu_mask_ptr; /* to KFD */
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};
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struct kfd_ioctl_get_queue_wave_state_args {
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__u64 ctl_stack_address; /* to KFD */
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__u32 ctl_stack_used_size; /* from KFD */
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__u32 save_area_used_size; /* from KFD */
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__u32 queue_id; /* to KFD */
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__u32 pad;
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uint64_t ctl_stack_address; /* to KFD */
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uint32_t ctl_stack_used_size; /* from KFD */
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uint32_t save_area_used_size; /* from KFD */
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uint32_t queue_id; /* to KFD */
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uint32_t pad;
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};
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/* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
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@ -105,13 +105,13 @@ struct kfd_ioctl_get_queue_wave_state_args {
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#define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
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struct kfd_ioctl_set_memory_policy_args {
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__u64 alternate_aperture_base; /* to KFD */
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__u64 alternate_aperture_size; /* to KFD */
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uint64_t alternate_aperture_base; /* to KFD */
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uint64_t alternate_aperture_size; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 default_policy; /* to KFD */
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__u32 alternate_policy; /* to KFD */
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__u32 pad;
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uint32_t gpu_id; /* to KFD */
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uint32_t default_policy; /* to KFD */
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uint32_t alternate_policy; /* to KFD */
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uint32_t pad;
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};
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/*
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@ -122,24 +122,24 @@ struct kfd_ioctl_set_memory_policy_args {
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*/
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struct kfd_ioctl_get_clock_counters_args {
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__u64 gpu_clock_counter; /* from KFD */
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__u64 cpu_clock_counter; /* from KFD */
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__u64 system_clock_counter; /* from KFD */
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__u64 system_clock_freq; /* from KFD */
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uint64_t gpu_clock_counter; /* from KFD */
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uint64_t cpu_clock_counter; /* from KFD */
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uint64_t system_clock_counter; /* from KFD */
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uint64_t system_clock_freq; /* from KFD */
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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uint32_t gpu_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_process_device_apertures {
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__u64 lds_base; /* from KFD */
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__u64 lds_limit; /* from KFD */
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__u64 scratch_base; /* from KFD */
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__u64 scratch_limit; /* from KFD */
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__u64 gpuvm_base; /* from KFD */
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__u64 gpuvm_limit; /* from KFD */
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__u32 gpu_id; /* from KFD */
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__u32 pad;
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uint64_t lds_base; /* from KFD */
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uint64_t lds_limit; /* from KFD */
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uint64_t scratch_base; /* from KFD */
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uint64_t scratch_limit; /* from KFD */
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uint64_t gpuvm_base; /* from KFD */
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uint64_t gpuvm_limit; /* from KFD */
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uint32_t gpu_id; /* from KFD */
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uint32_t pad;
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};
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/*
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@ -152,20 +152,20 @@ struct kfd_ioctl_get_process_apertures_args {
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struct kfd_process_device_apertures process_apertures[NUM_OF_SUPPORTED_GPUS]; /* from KFD */
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/* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
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__u32 num_of_nodes;
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__u32 pad;
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uint32_t num_of_nodes;
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uint32_t pad;
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};
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struct kfd_ioctl_get_process_apertures_new_args {
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/* User allocated. Pointer to struct kfd_process_device_apertures
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* filled in by Kernel
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*/
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__u64 kfd_process_device_apertures_ptr;
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uint64_t kfd_process_device_apertures_ptr;
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/* to KFD - indicates amount of memory present in kfd_process_device_apertures_ptr
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* from KFD - Number of entries filled by KFD.
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*/
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__u32 num_of_nodes;
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__u32 pad;
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uint32_t num_of_nodes;
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uint32_t pad;
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};
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#define MAX_ALLOWED_NUM_POINTS 100
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@ -173,25 +173,25 @@ struct kfd_ioctl_get_process_apertures_new_args {
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#define MAX_ALLOWED_WAC_BUFF_SIZE 128
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struct kfd_ioctl_dbg_register_args {
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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uint32_t gpu_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_ioctl_dbg_unregister_args {
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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uint32_t gpu_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_ioctl_dbg_address_watch_args {
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__u64 content_ptr; /* a pointer to the actual content */
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__u32 gpu_id; /* to KFD */
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__u32 buf_size_in_bytes; /*including gpu_id and buf_size */
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uint64_t content_ptr; /* a pointer to the actual content */
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uint32_t gpu_id; /* to KFD */
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uint32_t buf_size_in_bytes; /*including gpu_id and buf_size */
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};
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struct kfd_ioctl_dbg_wave_control_args {
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__u64 content_ptr; /* a pointer to the actual content */
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__u32 gpu_id; /* to KFD */
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__u32 buf_size_in_bytes; /*including gpu_id and buf_size */
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uint64_t content_ptr; /* a pointer to the actual content */
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uint32_t gpu_id; /* to KFD */
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uint32_t buf_size_in_bytes; /*including gpu_id and buf_size */
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};
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#define KFD_INVALID_FD 0xffffffff
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@ -228,43 +228,43 @@ struct kfd_ioctl_dbg_wave_control_args {
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#define KFD_MEM_ERR_GPU_HANG 3
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struct kfd_ioctl_create_event_args {
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__u64 event_page_offset; /* from KFD */
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__u32 event_trigger_data; /* from KFD - signal events only */
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__u32 event_type; /* to KFD */
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__u32 auto_reset; /* to KFD */
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__u32 node_id; /* to KFD - only valid for certain event types */
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__u32 event_id; /* from KFD */
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__u32 event_slot_index; /* from KFD */
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uint64_t event_page_offset; /* from KFD */
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uint32_t event_trigger_data; /* from KFD - signal events only */
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uint32_t event_type; /* to KFD */
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uint32_t auto_reset; /* to KFD */
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uint32_t node_id; /* to KFD - only valid for certain event types */
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uint32_t event_id; /* from KFD */
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uint32_t event_slot_index; /* from KFD */
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};
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struct kfd_ioctl_destroy_event_args {
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__u32 event_id; /* to KFD */
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__u32 pad;
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uint32_t event_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_ioctl_set_event_args {
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__u32 event_id; /* to KFD */
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__u32 pad;
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uint32_t event_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_ioctl_reset_event_args {
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__u32 event_id; /* to KFD */
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__u32 pad;
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uint32_t event_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_memory_exception_failure {
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__u32 NotPresent; /* Page not present or supervisor privilege */
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__u32 ReadOnly; /* Write access to a read-only page */
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__u32 NoExecute; /* Execute access to a page marked NX */
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__u32 imprecise; /* Can't determine the exact fault address */
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uint32_t NotPresent; /* Page not present or supervisor privilege */
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uint32_t ReadOnly; /* Write access to a read-only page */
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uint32_t NoExecute; /* Execute access to a page marked NX */
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uint32_t imprecise; /* Can't determine the exact fault address */
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};
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/* memory exception data */
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struct kfd_hsa_memory_exception_data {
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struct kfd_memory_exception_failure failure;
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__u64 va;
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__u32 gpu_id;
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__u32 ErrorType; /* 0 = no RAS error,
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uint64_t va;
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uint32_t gpu_id;
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uint32_t ErrorType; /* 0 = no RAS error,
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* 1 = ECC_SRAM,
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* 2 = Link_SYNFLOOD (poison),
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* 3 = GPU hang (not attributable to a specific cause),
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@ -274,10 +274,10 @@ struct kfd_hsa_memory_exception_data {
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/* hw exception data */
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struct kfd_hsa_hw_exception_data {
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__u32 reset_type;
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__u32 reset_cause;
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__u32 memory_lost;
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__u32 gpu_id;
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uint32_t reset_type;
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uint32_t reset_cause;
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uint32_t memory_lost;
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uint32_t gpu_id;
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};
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/* Event data */
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@ -286,57 +286,57 @@ struct kfd_event_data {
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struct kfd_hsa_memory_exception_data memory_exception_data;
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struct kfd_hsa_hw_exception_data hw_exception_data;
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}; /* From KFD */
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__u64 kfd_event_data_ext; /* pointer to an extension structure for future exception types */
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__u32 event_id; /* to KFD */
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__u32 pad;
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uint64_t kfd_event_data_ext; /* pointer to an extension structure for future exception types */
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uint32_t event_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_ioctl_wait_events_args {
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__u64 events_ptr; /* pointed to struct kfd_event_data array, to KFD */
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__u32 num_events; /* to KFD */
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__u32 wait_for_all; /* to KFD */
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__u32 timeout; /* to KFD */
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__u32 wait_result; /* from KFD */
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uint64_t events_ptr; /* pointed to struct kfd_event_data array, to KFD */
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uint32_t num_events; /* to KFD */
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uint32_t wait_for_all; /* to KFD */
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uint32_t timeout; /* to KFD */
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uint32_t wait_result; /* from KFD */
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};
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struct kfd_ioctl_set_scratch_backing_va_args {
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__u64 va_addr; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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uint64_t va_addr; /* to KFD */
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uint32_t gpu_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_ioctl_get_tile_config_args {
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/* to KFD: pointer to tile array */
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__u64 tile_config_ptr;
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uint64_t tile_config_ptr;
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/* to KFD: pointer to macro tile array */
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__u64 macro_tile_config_ptr;
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uint64_t macro_tile_config_ptr;
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/* to KFD: array size allocated by user mode
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* from KFD: array size filled by kernel
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*/
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__u32 num_tile_configs;
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uint32_t num_tile_configs;
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/* to KFD: array size allocated by user mode
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* from KFD: array size filled by kernel
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*/
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__u32 num_macro_tile_configs;
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uint32_t num_macro_tile_configs;
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__u32 gpu_id; /* to KFD */
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__u32 gb_addr_config; /* from KFD */
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__u32 num_banks; /* from KFD */
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__u32 num_ranks; /* from KFD */
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uint32_t gpu_id; /* to KFD */
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uint32_t gb_addr_config; /* from KFD */
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uint32_t num_banks; /* from KFD */
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uint32_t num_ranks; /* from KFD */
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/* struct size can be extended later if needed without breaking ABI compatibility */
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};
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struct kfd_ioctl_set_trap_handler_args {
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__u64 tba_addr; /* to KFD */
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__u64 tma_addr; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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uint64_t tba_addr; /* to KFD */
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uint64_t tma_addr; /* to KFD */
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uint32_t gpu_id; /* to KFD */
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uint32_t pad;
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};
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struct kfd_ioctl_acquire_vm_args {
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__u32 drm_fd; /* to KFD */
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__u32 gpu_id; /* to KFD */
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uint32_t drm_fd; /* to KFD */
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uint32_t gpu_id; /* to KFD */
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};
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/* Allocation flags: memory types */
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@ -367,12 +367,12 @@ struct kfd_ioctl_acquire_vm_args {
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* @flags: memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above
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*/
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struct kfd_ioctl_alloc_memory_of_gpu_args {
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__u64 va_addr; /* to KFD */
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__u64 size; /* to KFD */
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__u64 handle; /* from KFD */
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__u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */
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__u32 gpu_id; /* to KFD */
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__u32 flags;
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uint64_t va_addr; /* to KFD */
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uint64_t size; /* to KFD */
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uint64_t handle; /* from KFD */
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uint64_t mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */
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uint32_t gpu_id; /* to KFD */
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uint32_t flags;
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};
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/* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu
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@ -380,13 +380,13 @@ struct kfd_ioctl_alloc_memory_of_gpu_args {
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* @handle: memory handle returned by alloc
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*/
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struct kfd_ioctl_free_memory_of_gpu_args {
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__u64 handle; /* to KFD */
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uint64_t handle; /* to KFD */
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};
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/* Map memory to one or more GPUs
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*
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* @handle: memory handle returned by alloc
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* @device_ids_array_ptr: array of gpu_ids (__u32 per device)
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* @device_ids_array_ptr: array of gpu_ids (uint32_t per device)
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* @n_devices: number of devices in the array
|
||||
* @n_success: number of devices mapped successfully
|
||||
*
|
||||
|
|
@ -399,10 +399,10 @@ struct kfd_ioctl_free_memory_of_gpu_args {
|
|||
* n_devices.
|
||||
*/
|
||||
struct kfd_ioctl_map_memory_to_gpu_args {
|
||||
__u64 handle; /* to KFD */
|
||||
__u64 device_ids_array_ptr; /* to KFD */
|
||||
__u32 n_devices; /* to KFD */
|
||||
__u32 n_success; /* to/from KFD */
|
||||
uint64_t handle; /* to KFD */
|
||||
uint64_t device_ids_array_ptr; /* to KFD */
|
||||
uint32_t n_devices; /* to KFD */
|
||||
uint32_t n_success; /* to/from KFD */
|
||||
};
|
||||
|
||||
/* Unmap memory from one or more GPUs
|
||||
|
|
@ -410,10 +410,10 @@ struct kfd_ioctl_map_memory_to_gpu_args {
|
|||
* same arguments as for mapping
|
||||
*/
|
||||
struct kfd_ioctl_unmap_memory_from_gpu_args {
|
||||
__u64 handle; /* to KFD */
|
||||
__u64 device_ids_array_ptr; /* to KFD */
|
||||
__u32 n_devices; /* to KFD */
|
||||
__u32 n_success; /* to/from KFD */
|
||||
uint64_t handle; /* to KFD */
|
||||
uint64_t device_ids_array_ptr; /* to KFD */
|
||||
uint32_t n_devices; /* to KFD */
|
||||
uint32_t n_success; /* to/from KFD */
|
||||
};
|
||||
|
||||
/* Allocate GWS for specific queue
|
||||
|
|
@ -424,28 +424,28 @@ struct kfd_ioctl_unmap_memory_from_gpu_args {
|
|||
* only support contiguous GWS allocation
|
||||
*/
|
||||
struct kfd_ioctl_alloc_queue_gws_args {
|
||||
__u32 queue_id; /* to KFD */
|
||||
__u32 num_gws; /* to KFD */
|
||||
__u32 first_gws; /* from KFD */
|
||||
__u32 pad;
|
||||
uint32_t queue_id; /* to KFD */
|
||||
uint32_t num_gws; /* to KFD */
|
||||
uint32_t first_gws; /* from KFD */
|
||||
uint32_t pad;
|
||||
};
|
||||
|
||||
struct kfd_ioctl_get_dmabuf_info_args {
|
||||
__u64 size; /* from KFD */
|
||||
__u64 metadata_ptr; /* to KFD */
|
||||
__u32 metadata_size; /* to KFD (space allocated by user)
|
||||
uint64_t size; /* from KFD */
|
||||
uint64_t metadata_ptr; /* to KFD */
|
||||
uint32_t metadata_size; /* to KFD (space allocated by user)
|
||||
* from KFD (actual metadata size)
|
||||
*/
|
||||
__u32 gpu_id; /* from KFD */
|
||||
__u32 flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */
|
||||
__u32 dmabuf_fd; /* to KFD */
|
||||
uint32_t gpu_id; /* from KFD */
|
||||
uint32_t flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */
|
||||
uint32_t dmabuf_fd; /* to KFD */
|
||||
};
|
||||
|
||||
struct kfd_ioctl_import_dmabuf_args {
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u64 handle; /* from KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 dmabuf_fd; /* to KFD */
|
||||
uint64_t va_addr; /* to KFD */
|
||||
uint64_t handle; /* from KFD */
|
||||
uint32_t gpu_id; /* to KFD */
|
||||
uint32_t dmabuf_fd; /* to KFD */
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -463,8 +463,8 @@ enum kfd_smi_event {
|
|||
#define KFD_SMI_EVENT_MSG_SIZE 96
|
||||
|
||||
struct kfd_ioctl_smi_events_args {
|
||||
__u32 gpuid; /* to KFD */
|
||||
__u32 anon_fd; /* from KFD */
|
||||
uint32_t gpuid; /* to KFD */
|
||||
uint32_t anon_fd; /* from KFD */
|
||||
};
|
||||
|
||||
/**************************************************************************************************
|
||||
|
|
@ -510,33 +510,33 @@ enum kfd_criu_op {
|
|||
* Return: 0 on success, -errno on failure
|
||||
*/
|
||||
struct kfd_ioctl_criu_args {
|
||||
__u64 devices; /* Used during ops: CHECKPOINT, RESTORE */
|
||||
__u64 bos; /* Used during ops: CHECKPOINT, RESTORE */
|
||||
__u64 priv_data; /* Used during ops: CHECKPOINT, RESTORE */
|
||||
__u64 priv_data_size; /* Used during ops: PROCESS_INFO, RESTORE */
|
||||
__u32 num_devices; /* Used during ops: PROCESS_INFO, RESTORE */
|
||||
__u32 num_bos; /* Used during ops: PROCESS_INFO, RESTORE */
|
||||
__u32 num_objects; /* Used during ops: PROCESS_INFO, RESTORE */
|
||||
__u32 pid; /* Used during ops: PROCESS_INFO, RESUME */
|
||||
__u32 op;
|
||||
uint64_t devices; /* Used during ops: CHECKPOINT, RESTORE */
|
||||
uint64_t bos; /* Used during ops: CHECKPOINT, RESTORE */
|
||||
uint64_t priv_data; /* Used during ops: CHECKPOINT, RESTORE */
|
||||
uint64_t priv_data_size; /* Used during ops: PROCESS_INFO, RESTORE */
|
||||
uint32_t num_devices; /* Used during ops: PROCESS_INFO, RESTORE */
|
||||
uint32_t num_bos; /* Used during ops: PROCESS_INFO, RESTORE */
|
||||
uint32_t num_objects; /* Used during ops: PROCESS_INFO, RESTORE */
|
||||
uint32_t pid; /* Used during ops: PROCESS_INFO, RESUME */
|
||||
uint32_t op;
|
||||
};
|
||||
|
||||
struct kfd_criu_device_bucket {
|
||||
__u32 user_gpu_id;
|
||||
__u32 actual_gpu_id;
|
||||
__u32 drm_fd;
|
||||
__u32 pad;
|
||||
uint32_t user_gpu_id;
|
||||
uint32_t actual_gpu_id;
|
||||
uint32_t drm_fd;
|
||||
uint32_t pad;
|
||||
};
|
||||
|
||||
struct kfd_criu_bo_bucket {
|
||||
__u64 addr;
|
||||
__u64 size;
|
||||
__u64 offset;
|
||||
__u64 restored_offset; /* During restore, updated offset for BO */
|
||||
__u32 gpu_id; /* This is the user_gpu_id */
|
||||
__u32 alloc_flags;
|
||||
__u32 dmabuf_fd;
|
||||
__u32 pad;
|
||||
uint64_t addr;
|
||||
uint64_t size;
|
||||
uint64_t offset;
|
||||
uint64_t restored_offset; /* During restore, updated offset for BO */
|
||||
uint32_t gpu_id; /* This is the user_gpu_id */
|
||||
uint32_t alloc_flags;
|
||||
uint32_t dmabuf_fd;
|
||||
uint32_t pad;
|
||||
};
|
||||
|
||||
/* CRIU IOCTLs - END */
|
||||
|
|
@ -616,8 +616,8 @@ enum kfd_ioctl_svm_attr_type {
|
|||
* @value: attribute value
|
||||
*/
|
||||
struct kfd_ioctl_svm_attribute {
|
||||
__u32 type;
|
||||
__u32 value;
|
||||
uint32_t type;
|
||||
uint32_t value;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -659,10 +659,10 @@ struct kfd_ioctl_svm_attribute {
|
|||
* attribute type to indicate the access for the specified GPU.
|
||||
*/
|
||||
struct kfd_ioctl_svm_args {
|
||||
__u64 start_addr;
|
||||
__u64 size;
|
||||
__u32 op;
|
||||
__u32 nattr;
|
||||
uint64_t start_addr;
|
||||
uint64_t size;
|
||||
uint32_t op;
|
||||
uint32_t nattr;
|
||||
/* Variable length array of attributes */
|
||||
struct kfd_ioctl_svm_attribute attrs[0];
|
||||
};
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue