Mirrors/criu
1
0
Fork 0
mirror of https://github.com/checkpoint-restore/criu.git synced 2026-01-23 02:14:37 +00:00
Code Issues Projects Releases Wiki Activity

mips: coding style fixes

Browse source 
CRIU follows Linux kernel coding style. This patch updates the
architecture-specific code for MIPS to use tab indentation,
add whitespace between closing parenthesis and open bracket,
and changes the mode of source files from 755 to 644.

Signed-off-by: Radostin Stoyanov <rstoyanov@fedoraproject.org>
This commit is contained in:
Radostin Stoyanov 2021-04-30 20:54:01 +01:00 • committed by Andrei Vagin
parent 99a6a17c2f
commit 22142eedf0
38 changed files with 483 additions and 482 deletions
Download patch file Download diff file Expand all files Collapse all files

0
compel/arch/mips/plugins/include/asm/prologue.h Executable file → Normal file
View file

0
compel/arch/mips/plugins/include/asm/syscall-types.h Executable file → Normal file
View file

0
compel/arch/mips/plugins/include/features.h Executable file → Normal file
View file

5
compel/arch/mips/plugins/std/memcpy.S Executable file → Normal file
View file

@ -1,12 +1,12 @@
#include "common/asm/linkage.h"
.section .head.text, "ax"
ENTRY(memcpy)
.set noreorder
dadd v0,zero,a0
daddiu t1,zero,0
loop:
loop:
beq t1,a2,exit
nop
lb t2,0(a1)
@ -20,4 +20,3 @@ exit:
jr ra
nop
END(memcpy)

9
compel/arch/mips/plugins/std/parasite-head.S Executable file → Normal file
View file

@ -1,15 +1,14 @@
#include "common/asm/linkage.h"
.section .head.text, "ax"
ENTRY(__export_parasite_head_start)
.set push
.set noreorder
jal parasite_service
nop
.byte 0x0d, 0x00, 0x00, 0x00 //break
.byte 0x0d, 0x00, 0x00, 0x00 //break
.set pop
// .byte 0x40,0x01,0x00,0x00 //pause
// .byte 0x40,0x01,0x00,0x00 //pause
END(__export_parasite_head_start)

0
compel/arch/mips/plugins/std/syscalls/Makefile.syscalls Executable file → Normal file
View file

0
compel/arch/mips/plugins/std/syscalls/syscall-common-mips-64.S Executable file → Normal file
View file

0
compel/arch/mips/plugins/std/syscalls/syscall_64.tbl Executable file → Normal file
View file

1
compel/arch/mips/scripts/compel-pack-compat.lds.S Executable file → Normal file
View file

@ -1,4 +1,3 @@
OUTPUT_ARCH(mips)
EXTERN(__export_parasite_head_start)
ASSERT(0,"Compatible PIEs are unsupported on mips")

10
compel/arch/mips/scripts/compel-pack.lds.S Executable file → Normal file
View file

@ -3,17 +3,17 @@ EXTERN(__export_parasite_head_start)
SECTIONS
{
.text : {
.text : {
*(.head.text)
ASSERT(DEFINED(__export_parasite_head_start),
ASSERT(DEFINED(__export_parasite_head_start),
"Symbol __export_parasite_head_start is missing");
*(.text*)
*(.text*)
*(.compel.exit)
*(.compel.init)
/* .rodata section*/
*(.rodata*)
*(.got*)
/* .data section */
/* .data section */
*(.data*)
*(.bss*)
*(.sbss*)
@ -22,7 +22,7 @@ SECTIONS
/DISCARD/ : { /*segments need to discard */
*(.debug*)
*(.pdr)
*(.pdr)
*(.comment*)
*(.note*)
*(.group*)

14
compel/arch/mips/src/lib/cpu.c Executable file → Normal file
View file

@ -18,19 +18,19 @@ void compel_clear_cpu_cap(compel_cpuinfo_t *c, unsigned int feature){ }
int compel_test_cpu_cap(compel_cpuinfo_t *c, unsigned int feature)
{
return 0;
return 0;
}
int compel_cpuid(compel_cpuinfo_t *c){
return 0;
return 0;
}
bool compel_cpu_has_feature(unsigned int feature)
{
if (!rt_info_done) {
compel_cpuid(&rt_info);
rt_info_done = true;
}
if (!rt_info_done) {
compel_cpuid(&rt_info);
rt_info_done = true;
}
return compel_test_cpu_cap(&rt_info, feature);
return compel_test_cpu_cap(&rt_info, feature);
}

4
compel/arch/mips/src/lib/handle-elf.c Executable file → Normal file
View file

@ -15,8 +15,8 @@ extern int __handle_elf(void *mem, size_t size);
int handle_binary(void *mem, size_t size)
{
if (memcmp(mem, elf_ident_64_le, sizeof(elf_ident_64_le)) == 0)
return __handle_elf(mem, size);
if (memcmp(mem, elf_ident_64_le, sizeof(elf_ident_64_le)) == 0)
return __handle_elf(mem, size);
pr_err("Unsupported Elf format detected\n");
return -EINVAL;

0
compel/arch/mips/src/lib/include/handle-elf.h Executable file → Normal file
View file

193
compel/arch/mips/src/lib/include/ldsodefs.h Executable file → Normal file
View file

@ -1,20 +1,22 @@
/* Run-time dynamic linker data structures for loaded ELF shared objects.
Copyright (C) 2000-2014 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library. If not, see
<http://www.gnu.org/licenses/>. */
/*
* Run-time dynamic linker data structures for loaded ELF shared objects.
* Copyright (C) 2000-2014 Free Software Foundation, Inc.
* This file is part of the GNU C Library.
*
* The GNU C Library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* The GNU C Library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with the GNU C Library. If not, see
* <http://www.gnu.org/licenses/>.
*/
#ifndef _MIPS_LDSODEFS_H
#define _MIPS_LDSODEFS_H 1
@ -26,114 +28,121 @@ struct La_mips_32_retval;
struct La_mips_64_regs;
struct La_mips_64_retval;
#define ARCH_PLTENTER_MEMBERS \
Elf32_Addr (*mips_o32_gnu_pltenter) (Elf32_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
struct La_mips_32_regs *, \
unsigned int *, const char *name, \
long int *framesizep); \
Elf32_Addr (*mips_n32_gnu_pltenter) (Elf32_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
struct La_mips_64_regs *, \
unsigned int *, const char *name, \
long int *framesizep); \
Elf64_Addr (*mips_n64_gnu_pltenter) (Elf64_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
struct La_mips_64_regs *, \
unsigned int *, const char *name, \
#define ARCH_PLTENTER_MEMBERS \
Elf32_Addr (*mips_o32_gnu_pltenter) (Elf32_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
struct La_mips_32_regs *, \
unsigned int *, const char *name, \
long int *framesizep); \
Elf32_Addr (*mips_n32_gnu_pltenter) (Elf32_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
struct La_mips_64_regs *, \
unsigned int *, const char *name, \
long int *framesizep); \
Elf64_Addr (*mips_n64_gnu_pltenter) (Elf64_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
struct La_mips_64_regs *, \
unsigned int *, const char *name, \
long int *framesizep);
#define ARCH_PLTEXIT_MEMBERS \
unsigned int (*mips_o32_gnu_pltexit) (Elf32_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
const struct La_mips_32_regs *, \
struct La_mips_32_retval *, \
const char *); \
unsigned int (*mips_n32_gnu_pltexit) (Elf32_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
const struct La_mips_64_regs *, \
struct La_mips_64_retval *, \
const char *); \
unsigned int (*mips_n64_gnu_pltexit) (Elf64_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
const struct La_mips_64_regs *, \
struct La_mips_64_retval *, \
#define ARCH_PLTEXIT_MEMBERS \
unsigned int (*mips_o32_gnu_pltexit) (Elf32_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
const struct La_mips_32_regs *, \
struct La_mips_32_retval *, \
const char *); \
unsigned int (*mips_n32_gnu_pltexit) (Elf32_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
const struct La_mips_64_regs *, \
struct La_mips_64_retval *, \
const char *); \
unsigned int (*mips_n64_gnu_pltexit) (Elf64_Sym *, unsigned int, \
uintptr_t *, uintptr_t *, \
const struct La_mips_64_regs *, \
struct La_mips_64_retval *, \
const char *);
/* The MIPS ABI specifies that the dynamic section has to be read-only. */
/* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each
relocation entry specifies up to three actual relocations, all at
the same address. The first relocation which required a symbol
uses the symbol in the r_sym field. The second relocation which
requires a symbol uses the symbol in the r_ssym field. If all
three relocations require a symbol, the third one uses a zero
value.
We define these structures in internal headers because we're not
sure we want to make them part of the ABI yet. Eventually, some of
this may move into elf/elf.h. */
/*
* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each
* relocation entry specifies up to three actual relocations, all at
* the same address. The first relocation which required a symbol
* uses the symbol in the r_sym field. The second relocation which
* requires a symbol uses the symbol in the r_ssym field. If all
* three relocations require a symbol, the third one uses a zero
* value.
*
* We define these structures in internal headers because we're not
* sure we want to make them part of the ABI yet. Eventually, some of
* this may move into elf/elf.h.
*/
/* An entry in a 64 bit SHT_REL section. */
typedef struct
{
Elf32_Word r_sym; /* Symbol index */
unsigned char r_ssym; /* Special symbol for 2nd relocation */
unsigned char r_type3; /* 3rd relocation type */
unsigned char r_type2; /* 2nd relocation type */
unsigned char r_type1; /* 1st relocation type */
Elf32_Word r_sym; /* Symbol index */
unsigned char r_ssym; /* Special symbol for 2nd relocation */
unsigned char r_type3; /* 3rd relocation type */
unsigned char r_type2; /* 2nd relocation type */
unsigned char r_type1; /* 1st relocation type */
} _Elf64_Mips_R_Info;
typedef union
{
Elf64_Xword r_info_number;
_Elf64_Mips_R_Info r_info_fields;
Elf64_Xword r_info_number;
_Elf64_Mips_R_Info r_info_fields;
} _Elf64_Mips_R_Info_union;
typedef struct
{
Elf64_Addr r_offset; /* Address */
_Elf64_Mips_R_Info_union r_info; /* Relocation type and symbol index */
Elf64_Addr r_offset; /* Address */
_Elf64_Mips_R_Info_union r_info; /* Relocation type and symbol index */
} Elf64_Mips_Rel;
typedef struct
{
Elf64_Addr r_offset; /* Address */
_Elf64_Mips_R_Info_union r_info; /* Relocation type and symbol index */
Elf64_Sxword r_addend; /* Addend */
Elf64_Addr r_offset; /* Address */
_Elf64_Mips_R_Info_union r_info; /* Relocation type and symbol index */
Elf64_Sxword r_addend; /* Addend */
} Elf64_Mips_Rela;
#define ELF64_MIPS_R_SYM(i) \
((__extension__ (_Elf64_Mips_R_Info_union)(i)).r_info_fields.r_sym)
((__extension__ (_Elf64_Mips_R_Info_union)(i)).r_info_fields.r_sym)
#define ELF64_MIPS_R_TYPE(i) \
(((_Elf64_Mips_R_Info_union)(i)).r_info_fields.r_type1 \
| ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
).r_info_fields.r_type2 << 8) \
| ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
).r_info_fields.r_type3 << 16) \
| ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
).r_info_fields.r_ssym << 24))
(((_Elf64_Mips_R_Info_union)(i)).r_info_fields.r_type1 \
| ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
).r_info_fields.r_type2 << 8) \
| ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
).r_info_fields.r_type3 << 16) \
| ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
).r_info_fields.r_ssym << 24))
#define ELF64_MIPS_R_INFO(sym, type) \
(__extension__ (_Elf64_Mips_R_Info_union) \
(__extension__ (_Elf64_Mips_R_Info) \
{ (sym), ELF64_MIPS_R_SSYM (type), \
ELF64_MIPS_R_TYPE3 (type), \
ELF64_MIPS_R_TYPE2 (type), \
ELF64_MIPS_R_TYPE1 (type) \
}).r_info_number)
/* These macros decompose the value returned by ELF64_MIPS_R_TYPE, and
compose it back into a value that it can be used as an argument to
ELF64_MIPS_R_INFO. */
(__extension__ (_Elf64_Mips_R_Info_union) \
(__extension__ (_Elf64_Mips_R_Info) \
{ (sym), ELF64_MIPS_R_SSYM (type), \
ELF64_MIPS_R_TYPE3 (type), \
ELF64_MIPS_R_TYPE2 (type), \
ELF64_MIPS_R_TYPE1 (type) \
}).r_info_number)
/*
* These macros decompose the value returned by ELF64_MIPS_R_TYPE, and
* compose it back into a value that it can be used as an argument to
* ELF64_MIPS_R_INFO.
*/
#define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
#define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
#define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
#define ELF64_MIPS_R_TYPE1(i) ((i) & 0xff)
#define ELF64_MIPS_R_TYPEENC(type1, type2, type3, ssym) \
((type1) \
| ((Elf32_Word)(type2) << 8) \
| ((Elf32_Word)(type3) << 16) \
| ((Elf32_Word)(ssym) << 24))
((type1) \
| ((Elf32_Word)(type2) << 8) \
| ((Elf32_Word)(type3) << 16) \
| ((Elf32_Word)(ssym) << 24))
#undef ELF64_R_SYM
#define ELF64_R_SYM(i) ELF64_MIPS_R_SYM (i)

0
compel/arch/mips/src/lib/include/syscall.h Executable file → Normal file
View file

0
compel/arch/mips/src/lib/include/uapi/asm/breakpoints.h Executable file → Normal file
View file

0
compel/arch/mips/src/lib/include/uapi/asm/cpu.h Executable file → Normal file
View file

3
compel/arch/mips/src/lib/include/uapi/asm/infect-types.h Executable file → Normal file
View file

@ -10,11 +10,10 @@
#define SIGMAX_OLD 31
/*
* Copied from the Linux kernel header arch/mips/include/asm/ptrace.h
*
* A thread MIPS CPU context
**/
*/
typedef struct {
/* Saved main processor registers. */
__u64 regs[32];

28
compel/arch/mips/src/lib/include/uapi/asm/sigframe.h Executable file → Normal file
View file

@ -18,18 +18,18 @@
/* refer to linux-3.10/include/uapi/asm-generic/ucontext.h */
struct k_ucontext{
unsigned long uc_flags;
struct k_ucontext *uc_link;
stack_t uc_stack;
struct sigcontext uc_mcontext;
k_rtsigset_t uc_sigmask;
unsigned long uc_flags;
struct k_ucontext *uc_link;
stack_t uc_stack;
struct sigcontext uc_mcontext;
k_rtsigset_t uc_sigmask;
};
/* Copy from the kernel source arch/mips/kernel/signal.c */
struct rt_sigframe {
u32 rs_ass[4]; /* argument save space for o32 */
u32 rs_pad[2]; /* Was: signal trampoline */
siginfo_t rs_info;
siginfo_t rs_info;
struct k_ucontext rs_uc;
};
@ -44,14 +44,14 @@ struct rt_sigframe {
#define RT_SIGFRAME_OFFSET(rt_sigframe) 0
#define ARCH_RT_SIGRETURN(new_sp, rt_sigframe) \
asm volatile( \
"move $29, %0 \n" \
"li $2, "__stringify(__NR_rt_sigreturn)" \n" \
"syscall \n" \
: \
: "r"(new_sp) \
: "$29","$2","memory")
#define ARCH_RT_SIGRETURN(new_sp, rt_sigframe) \
asm volatile( \
"move $29, %0 \n" \
"li $2, "__stringify(__NR_rt_sigreturn)" \n" \
"syscall \n" \
: \
: "r"(new_sp) \
: "$29","$2","memory")
int sigreturn_prep_fpu_frame(struct rt_sigframe *sigframe,
struct rt_sigframe *rsigframe);

0
compel/arch/mips/src/lib/include/uapi/asm/siginfo.h Executable file → Normal file
View file

287
compel/arch/mips/src/lib/infect.c Executable file → Normal file
View file

@ -17,26 +17,27 @@
#include "infect-priv.h"
#include "log.h"
#include "common/bug.h"
/*
* Injected syscall instruction
* mips64el is Little Endian
*/
const char code_syscall[] = {
0x0c, 0x00, 0x00, 0x00, /* syscall */
0x0d, 0x00, 0x00, 0x00 /* break */
0x0c, 0x00, 0x00, 0x00, /* syscall */
0x0d, 0x00, 0x00, 0x00 /* break */
};
/* 10-byte legacy floating point register */
struct fpreg {
uint16_t significand[4];
uint16_t exponent;
uint16_t significand[4];
uint16_t exponent;
};
/* 16-byte floating point register */
struct fpxreg {
uint16_t significand[4];
uint16_t exponent;
uint16_t padding[3];
uint16_t significand[4];
uint16_t exponent;
uint16_t padding[3];
};
@ -44,82 +45,82 @@ int sigreturn_prep_regs_plain(struct rt_sigframe *sigframe,
user_regs_struct_t *regs,
user_fpregs_struct_t *fpregs)
{
sigframe->rs_uc.uc_mcontext.sc_regs[0] = regs->regs[0];
sigframe->rs_uc.uc_mcontext.sc_regs[1] = regs->regs[1];
sigframe->rs_uc.uc_mcontext.sc_regs[2] = regs->regs[2];
sigframe->rs_uc.uc_mcontext.sc_regs[3] = regs->regs[3];
sigframe->rs_uc.uc_mcontext.sc_regs[4] = regs->regs[4];
sigframe->rs_uc.uc_mcontext.sc_regs[5] = regs->regs[5];
sigframe->rs_uc.uc_mcontext.sc_regs[6] = regs->regs[6];
sigframe->rs_uc.uc_mcontext.sc_regs[7] = regs->regs[7];
sigframe->rs_uc.uc_mcontext.sc_regs[8] = regs->regs[8];
sigframe->rs_uc.uc_mcontext.sc_regs[9] = regs->regs[9];
sigframe->rs_uc.uc_mcontext.sc_regs[10] = regs->regs[10];
sigframe->rs_uc.uc_mcontext.sc_regs[11] = regs->regs[11];
sigframe->rs_uc.uc_mcontext.sc_regs[12] = regs->regs[12];
sigframe->rs_uc.uc_mcontext.sc_regs[13] = regs->regs[13];
sigframe->rs_uc.uc_mcontext.sc_regs[14] = regs->regs[14];
sigframe->rs_uc.uc_mcontext.sc_regs[15] = regs->regs[15];
sigframe->rs_uc.uc_mcontext.sc_regs[16] = regs->regs[16];
sigframe->rs_uc.uc_mcontext.sc_regs[17] = regs->regs[17];
sigframe->rs_uc.uc_mcontext.sc_regs[18] = regs->regs[18];
sigframe->rs_uc.uc_mcontext.sc_regs[19] = regs->regs[19];
sigframe->rs_uc.uc_mcontext.sc_regs[20] = regs->regs[20];
sigframe->rs_uc.uc_mcontext.sc_regs[21] = regs->regs[21];
sigframe->rs_uc.uc_mcontext.sc_regs[22] = regs->regs[22];
sigframe->rs_uc.uc_mcontext.sc_regs[23] = regs->regs[23];
sigframe->rs_uc.uc_mcontext.sc_regs[24] = regs->regs[24];
sigframe->rs_uc.uc_mcontext.sc_regs[25] = regs->regs[25];
sigframe->rs_uc.uc_mcontext.sc_regs[26] = regs->regs[26];
sigframe->rs_uc.uc_mcontext.sc_regs[27] = regs->regs[27];
sigframe->rs_uc.uc_mcontext.sc_regs[28] = regs->regs[28];
sigframe->rs_uc.uc_mcontext.sc_regs[29] = regs->regs[29];
sigframe->rs_uc.uc_mcontext.sc_regs[30] = regs->regs[30];
sigframe->rs_uc.uc_mcontext.sc_regs[31] = regs->regs[31];
sigframe->rs_uc.uc_mcontext.sc_mdlo = regs->lo;
sigframe->rs_uc.uc_mcontext.sc_mdhi = regs->hi;
sigframe->rs_uc.uc_mcontext.sc_pc = regs->cp0_epc;
sigframe->rs_uc.uc_mcontext.sc_regs[0] = regs->regs[0];
sigframe->rs_uc.uc_mcontext.sc_regs[1] = regs->regs[1];
sigframe->rs_uc.uc_mcontext.sc_regs[2] = regs->regs[2];
sigframe->rs_uc.uc_mcontext.sc_regs[3] = regs->regs[3];
sigframe->rs_uc.uc_mcontext.sc_regs[4] = regs->regs[4];
sigframe->rs_uc.uc_mcontext.sc_regs[5] = regs->regs[5];
sigframe->rs_uc.uc_mcontext.sc_regs[6] = regs->regs[6];
sigframe->rs_uc.uc_mcontext.sc_regs[7] = regs->regs[7];
sigframe->rs_uc.uc_mcontext.sc_regs[8] = regs->regs[8];
sigframe->rs_uc.uc_mcontext.sc_regs[9] = regs->regs[9];
sigframe->rs_uc.uc_mcontext.sc_regs[10] = regs->regs[10];
sigframe->rs_uc.uc_mcontext.sc_regs[11] = regs->regs[11];
sigframe->rs_uc.uc_mcontext.sc_regs[12] = regs->regs[12];
sigframe->rs_uc.uc_mcontext.sc_regs[13] = regs->regs[13];
sigframe->rs_uc.uc_mcontext.sc_regs[14] = regs->regs[14];
sigframe->rs_uc.uc_mcontext.sc_regs[15] = regs->regs[15];
sigframe->rs_uc.uc_mcontext.sc_regs[16] = regs->regs[16];
sigframe->rs_uc.uc_mcontext.sc_regs[17] = regs->regs[17];
sigframe->rs_uc.uc_mcontext.sc_regs[18] = regs->regs[18];
sigframe->rs_uc.uc_mcontext.sc_regs[19] = regs->regs[19];
sigframe->rs_uc.uc_mcontext.sc_regs[20] = regs->regs[20];
sigframe->rs_uc.uc_mcontext.sc_regs[21] = regs->regs[21];
sigframe->rs_uc.uc_mcontext.sc_regs[22] = regs->regs[22];
sigframe->rs_uc.uc_mcontext.sc_regs[23] = regs->regs[23];
sigframe->rs_uc.uc_mcontext.sc_regs[24] = regs->regs[24];
sigframe->rs_uc.uc_mcontext.sc_regs[25] = regs->regs[25];
sigframe->rs_uc.uc_mcontext.sc_regs[26] = regs->regs[26];
sigframe->rs_uc.uc_mcontext.sc_regs[27] = regs->regs[27];
sigframe->rs_uc.uc_mcontext.sc_regs[28] = regs->regs[28];
sigframe->rs_uc.uc_mcontext.sc_regs[29] = regs->regs[29];
sigframe->rs_uc.uc_mcontext.sc_regs[30] = regs->regs[30];
sigframe->rs_uc.uc_mcontext.sc_regs[31] = regs->regs[31];
sigframe->rs_uc.uc_mcontext.sc_mdlo = regs->lo;
sigframe->rs_uc.uc_mcontext.sc_mdhi = regs->hi;
sigframe->rs_uc.uc_mcontext.sc_pc = regs->cp0_epc;
sigframe->rs_uc.uc_mcontext.sc_fpregs[0] = fpregs->regs[0];
sigframe->rs_uc.uc_mcontext.sc_fpregs[1] = fpregs->regs[1];
sigframe->rs_uc.uc_mcontext.sc_fpregs[2] = fpregs->regs[2];
sigframe->rs_uc.uc_mcontext.sc_fpregs[3] = fpregs->regs[3];
sigframe->rs_uc.uc_mcontext.sc_fpregs[4] = fpregs->regs[4];
sigframe->rs_uc.uc_mcontext.sc_fpregs[5] = fpregs->regs[5];
sigframe->rs_uc.uc_mcontext.sc_fpregs[6] = fpregs->regs[6];
sigframe->rs_uc.uc_mcontext.sc_fpregs[7] = fpregs->regs[7];
sigframe->rs_uc.uc_mcontext.sc_fpregs[8] = fpregs->regs[8];
sigframe->rs_uc.uc_mcontext.sc_fpregs[9] = fpregs->regs[9];
sigframe->rs_uc.uc_mcontext.sc_fpregs[10] = fpregs->regs[10];
sigframe->rs_uc.uc_mcontext.sc_fpregs[11] = fpregs->regs[11];
sigframe->rs_uc.uc_mcontext.sc_fpregs[12] = fpregs->regs[12];
sigframe->rs_uc.uc_mcontext.sc_fpregs[13] = fpregs->regs[13];
sigframe->rs_uc.uc_mcontext.sc_fpregs[14] = fpregs->regs[14];
sigframe->rs_uc.uc_mcontext.sc_fpregs[15] = fpregs->regs[15];
sigframe->rs_uc.uc_mcontext.sc_fpregs[16] = fpregs->regs[16];
sigframe->rs_uc.uc_mcontext.sc_fpregs[17] = fpregs->regs[17];
sigframe->rs_uc.uc_mcontext.sc_fpregs[18] = fpregs->regs[18];
sigframe->rs_uc.uc_mcontext.sc_fpregs[19] = fpregs->regs[19];
sigframe->rs_uc.uc_mcontext.sc_fpregs[20] = fpregs->regs[20];
sigframe->rs_uc.uc_mcontext.sc_fpregs[21] = fpregs->regs[21];
sigframe->rs_uc.uc_mcontext.sc_fpregs[22] = fpregs->regs[22];
sigframe->rs_uc.uc_mcontext.sc_fpregs[23] = fpregs->regs[23];
sigframe->rs_uc.uc_mcontext.sc_fpregs[24] = fpregs->regs[24];
sigframe->rs_uc.uc_mcontext.sc_fpregs[25] = fpregs->regs[25];
sigframe->rs_uc.uc_mcontext.sc_fpregs[26] = fpregs->regs[26];
sigframe->rs_uc.uc_mcontext.sc_fpregs[27] = fpregs->regs[27];
sigframe->rs_uc.uc_mcontext.sc_fpregs[28] = fpregs->regs[28];
sigframe->rs_uc.uc_mcontext.sc_fpregs[29] = fpregs->regs[29];
sigframe->rs_uc.uc_mcontext.sc_fpregs[30] = fpregs->regs[30];
sigframe->rs_uc.uc_mcontext.sc_fpregs[31] = fpregs->regs[31];
sigframe->rs_uc.uc_mcontext.sc_fpregs[0] = fpregs->regs[0];
sigframe->rs_uc.uc_mcontext.sc_fpregs[1] = fpregs->regs[1];
sigframe->rs_uc.uc_mcontext.sc_fpregs[2] = fpregs->regs[2];
sigframe->rs_uc.uc_mcontext.sc_fpregs[3] = fpregs->regs[3];
sigframe->rs_uc.uc_mcontext.sc_fpregs[4] = fpregs->regs[4];
sigframe->rs_uc.uc_mcontext.sc_fpregs[5] = fpregs->regs[5];
sigframe->rs_uc.uc_mcontext.sc_fpregs[6] = fpregs->regs[6];
sigframe->rs_uc.uc_mcontext.sc_fpregs[7] = fpregs->regs[7];
sigframe->rs_uc.uc_mcontext.sc_fpregs[8] = fpregs->regs[8];
sigframe->rs_uc.uc_mcontext.sc_fpregs[9] = fpregs->regs[9];
sigframe->rs_uc.uc_mcontext.sc_fpregs[10] = fpregs->regs[10];
sigframe->rs_uc.uc_mcontext.sc_fpregs[11] = fpregs->regs[11];
sigframe->rs_uc.uc_mcontext.sc_fpregs[12] = fpregs->regs[12];
sigframe->rs_uc.uc_mcontext.sc_fpregs[13] = fpregs->regs[13];
sigframe->rs_uc.uc_mcontext.sc_fpregs[14] = fpregs->regs[14];
sigframe->rs_uc.uc_mcontext.sc_fpregs[15] = fpregs->regs[15];
sigframe->rs_uc.uc_mcontext.sc_fpregs[16] = fpregs->regs[16];
sigframe->rs_uc.uc_mcontext.sc_fpregs[17] = fpregs->regs[17];
sigframe->rs_uc.uc_mcontext.sc_fpregs[18] = fpregs->regs[18];
sigframe->rs_uc.uc_mcontext.sc_fpregs[19] = fpregs->regs[19];
sigframe->rs_uc.uc_mcontext.sc_fpregs[20] = fpregs->regs[20];
sigframe->rs_uc.uc_mcontext.sc_fpregs[21] = fpregs->regs[21];
sigframe->rs_uc.uc_mcontext.sc_fpregs[22] = fpregs->regs[22];
sigframe->rs_uc.uc_mcontext.sc_fpregs[23] = fpregs->regs[23];
sigframe->rs_uc.uc_mcontext.sc_fpregs[24] = fpregs->regs[24];
sigframe->rs_uc.uc_mcontext.sc_fpregs[25] = fpregs->regs[25];
sigframe->rs_uc.uc_mcontext.sc_fpregs[26] = fpregs->regs[26];
sigframe->rs_uc.uc_mcontext.sc_fpregs[27] = fpregs->regs[27];
sigframe->rs_uc.uc_mcontext.sc_fpregs[28] = fpregs->regs[28];
sigframe->rs_uc.uc_mcontext.sc_fpregs[29] = fpregs->regs[29];
sigframe->rs_uc.uc_mcontext.sc_fpregs[30] = fpregs->regs[30];
sigframe->rs_uc.uc_mcontext.sc_fpregs[31] = fpregs->regs[31];
return 0;
return 0;
}
int sigreturn_prep_fpu_frame_plain(struct rt_sigframe *sigframe,
struct rt_sigframe *rsigframe)
{
return 0;
return 0;
}
int compel_get_task_regs(pid_t pid, user_regs_struct_t *regs,
@ -132,26 +133,26 @@ int compel_get_task_regs(pid_t pid, user_regs_struct_t *regs,
pr_info("Dumping GP/FPU registers for %d\n", pid);
if (ptrace(PTRACE_GETFPREGS, pid, NULL, xs)) {
pr_perror("Can't obtain FPU registers for %d", pid);
return ret;
pr_perror("Can't obtain FPU registers for %d", pid);
return ret;
}
/*Restart the system call*/
if (regs->regs[0]){
switch ((long)(int)regs->regs[2]) {
if (regs->regs[0]) {
switch ((long)(int)regs->regs[2]) {
case ERESTARTNOHAND:
case ERESTARTSYS:
case ERESTARTNOINTR:
regs->regs[2] = regs->regs[0];
regs->regs[7] = regs->regs[26];
regs->cp0_epc -= 4;
break;
regs->regs[2] = regs->regs[0];
regs->regs[7] = regs->regs[26];
regs->cp0_epc -= 4;
break;
case ERESTART_RESTARTBLOCK:
pr_warn("Will restore %d with interrupted system call\n", pid);
regs->regs[2] = -EINTR;
break;
}
regs->regs[0] = 0;
pr_warn("Will restore %d with interrupted system call\n", pid);
regs->regs[2] = -EINTR;
break;
}
regs->regs[0] = 0;
}
ret = save(arg, regs, xs);
@ -177,7 +178,7 @@ int compel_syscall(struct parasite_ctl *ctl, int nr, long *ret,
unsigned long arg5,
unsigned long arg6)
{
/*refer to glibc-2.20/sysdeps/unix/sysv/linux/mips/mips64/syscall.S*/
/*refer to glibc-2.20/sysdeps/unix/sysv/linux/mips/mips64/syscall.S*/
user_regs_struct_t regs = ctl->orig.regs;
int err;
@ -203,7 +204,7 @@ void *remote_mmap(struct parasite_ctl *ctl,
int err;
err = compel_syscall(ctl, __NR_mmap, &map,
(unsigned long)addr, length, prot, flags, fd, offset >> PAGE_SHIFT);
(unsigned long)addr, length, prot, flags, fd, offset >> PAGE_SHIFT);
if (err < 0 || IS_ERR_VALUE(map)) {
pr_err("remote mmap() failed: %s\n", strerror(-map));
@ -218,38 +219,38 @@ void *remote_mmap(struct parasite_ctl *ctl,
*/
void parasite_setup_regs(unsigned long new_ip, void *stack, user_regs_struct_t *regs)
{
regs->cp0_epc = new_ip;
if (stack){
/* regs[29] is sp */
regs->regs[29] = (unsigned long)stack;
}
regs->cp0_epc = new_ip;
if (stack) {
/* regs[29] is sp */
regs->regs[29] = (unsigned long)stack;
}
}
bool arch_can_dump_task(struct parasite_ctl *ctl)
{
return true;
return true;
}
int arch_fetch_sas(struct parasite_ctl *ctl, struct rt_sigframe *s)
{
long ret;
int err;
long ret;
int err;
err = compel_syscall(ctl, __NR_sigaltstack,
err = compel_syscall(ctl, __NR_sigaltstack,
&ret, 0, (unsigned long)&s->rs_uc.uc_stack,
0, 0, 0, 0);
return err ? err : ret;
return err ? err : ret;
}
int ptrace_set_breakpoint(pid_t pid, void *addr)
{
return 0;
return 0;
}
int ptrace_flush_breakpoints(pid_t pid)
{
return 0;
return 0;
}
/*refer to kernel linux-3.10/arch/mips/include/asm/processor.h*/
@ -265,7 +266,7 @@ unsigned long compel_task_size(void) { return TASK_SIZE; }
*/
int ptrace_get_regs(int pid, user_regs_struct_t *regs)
{
return ptrace(PTRACE_GETREGS, pid, NULL, regs);
return ptrace(PTRACE_GETREGS, pid, NULL, regs);
}
/*
@ -273,7 +274,7 @@ int ptrace_get_regs(int pid, user_regs_struct_t *regs)
*/
int ptrace_set_regs(int pid, user_regs_struct_t *regs)
{
return ptrace(PTRACE_SETREGS, pid, NULL, regs);
return ptrace(PTRACE_SETREGS, pid, NULL, regs);
}
void compel_relocs_apply_mips(void *mem, void *vbase, struct parasite_blob_desc *pbd)
@ -282,45 +283,41 @@ void compel_relocs_apply_mips(void *mem, void *vbase, struct parasite_blob_desc
size_t nr_relocs = pbd->hdr.nr_relocs;
size_t i, j;
/*
* mips rebasing :load time relocation
* parasite.built-in.o and restorer.built-in.o is ELF 64-bit LSB relocatable for mips.
* so we have to relocate some type for R_MIPS_26 R_MIPS_HIGHEST R_MIPS_HIGHER R_MIPS_HI16 and R_MIPS_LO16 in there.
* for mips64el .if toload/store data or jump instruct ,need to relocation R_TYPE
*/
for (i = 0, j = 0; i < nr_relocs; i++) {
if (elf_relocs[i].type & COMPEL_TYPE_MIPS_26) {
int *where = (mem + elf_relocs[i].offset);
*where = *where | ((elf_relocs[i].addend + ((unsigned long)vbase & 0x00fffffff) /*low 28 bit*/)>>2);
/*
* mips rebasing :load time relocation
* parasite.built-in.o and restorer.built-in.o is ELF 64-bit LSB relocatable for mips.
* so we have to relocate some type for R_MIPS_26 R_MIPS_HIGHEST R_MIPS_HIGHER R_MIPS_HI16 and R_MIPS_LO16 in there.
* for mips64el .if toload/store data or jump instruct ,need to relocation R_TYPE
*/
for (i = 0, j = 0; i < nr_relocs; i++) {
if (elf_relocs[i].type & COMPEL_TYPE_MIPS_26) {
int *where = (mem + elf_relocs[i].offset);
*where = *where | ((elf_relocs[i].addend + ((unsigned long)vbase & 0x00fffffff) /*low 28 bit*/)>>2);
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_64) {
unsigned long *where = (mem + elf_relocs[i].offset);
*where = elf_relocs[i].addend + (unsigned long)vbase;
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_HI16) {
/* refer to binutils mips.cc */
int *where = (mem + elf_relocs[i].offset);
int v_lo16 = (unsigned long)vbase &0x00ffff;
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_64) {
unsigned long *where = (mem + elf_relocs[i].offset);
*where = elf_relocs[i].addend + (unsigned long)vbase;
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_HI16) {
/* refer to binutils mips.cc */
int *where = (mem + elf_relocs[i].offset);
int v_lo16 = (unsigned long)vbase &0x00ffff;
if ((v_lo16+elf_relocs[i].value+elf_relocs[i].addend) >= 0x8000){
*where = *where | ((((unsigned long)vbase>>16) &0xffff)+0x1);
} else {
*where = *where | ((((unsigned long)vbase>>16) &0xffff));
}
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_LO16) {
int *where = (mem + elf_relocs[i].offset);
int v_lo16 = (unsigned long)vbase &0x00ffff;
*where = *where | ((v_lo16 + elf_relocs[i].addend) & 0xffff);
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_HIGHER) {
int *where = (mem + elf_relocs[i].offset);
*where = *where | ((( (unsigned long)vbase + (uint64_t) 0x80008000) >> 32) & 0xffff);
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_HIGHEST) {
int *where = (mem + elf_relocs[i].offset);
*where = *where | ((( (unsigned long)vbase + (uint64_t) 0x800080008000llu) >> 48) & 0xffff);
} else
BUG();
}
if ((v_lo16+elf_relocs[i].value+elf_relocs[i].addend) >= 0x8000) {
*where = *where | ((((unsigned long)vbase>>16) &0xffff)+0x1);
} else {
*where = *where | ((((unsigned long)vbase>>16) &0xffff));
}
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_LO16) {
int *where = (mem + elf_relocs[i].offset);
int v_lo16 = (unsigned long)vbase &0x00ffff;
*where = *where | ((v_lo16 + elf_relocs[i].addend) & 0xffff);
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_HIGHER) {
int *where = (mem + elf_relocs[i].offset);
*where = *where | ((( (unsigned long)vbase + (uint64_t) 0x80008000) >> 32) & 0xffff);
} else if (elf_relocs[i].type & COMPEL_TYPE_MIPS_HIGHEST) {
int *where = (mem + elf_relocs[i].offset);
*where = *where | ((( (unsigned long)vbase + (uint64_t) 0x800080008000llu) >> 48) & 0xffff);
} else {
BUG();
}
}
}

0
criu/arch/mips/Makefile Executable file → Normal file
View file

18
criu/arch/mips/cpu.c Executable file → Normal file
View file

@ -25,29 +25,29 @@
int cpu_init(void)
{
return 0;
return 0;
}
int cpu_dump_cpuinfo(void)
{
return 0;
return 0;
}
int cpu_validate_cpuinfo(void)
{
return 0;
return 0;
}
int cpuinfo_dump(void)
{
if (cpu_init())
return -1;
if (cpu_dump_cpuinfo())
return -1;
return 0;
if (cpu_init())
return -1;
if (cpu_dump_cpuinfo())
return -1;
return 0;
}
int cpuinfo_check(void)
{
return 0;
return 0;
}

358
criu/arch/mips/crtools.c Executable file → Normal file
View file

@ -30,223 +30,223 @@
int save_task_regs(void *x, user_regs_struct_t *regs, user_fpregs_struct_t *fpregs)
{
CoreEntry *core = x;
CoreEntry *core = x;
/* Save the MIPS CPU state */
core->ti_mips->gpregs->r0 = regs->regs[0];
core->ti_mips->gpregs->r1 = regs->regs[1];
core->ti_mips->gpregs->r2 = regs->regs[2];
core->ti_mips->gpregs->r3 = regs->regs[3];
core->ti_mips->gpregs->r4 = regs->regs[4];
core->ti_mips->gpregs->r5 = regs->regs[5];
core->ti_mips->gpregs->r6 = regs->regs[6];
core->ti_mips->gpregs->r7 = regs->regs[7];
core->ti_mips->gpregs->r8 = regs->regs[8];
core->ti_mips->gpregs->r9 = regs->regs[9];
core->ti_mips->gpregs->r10 = regs->regs[10];
core->ti_mips->gpregs->r11 = regs->regs[11];
core->ti_mips->gpregs->r12 = regs->regs[12];
core->ti_mips->gpregs->r13 = regs->regs[13];
core->ti_mips->gpregs->r14 = regs->regs[14];
core->ti_mips->gpregs->r15 = regs->regs[15];
core->ti_mips->gpregs->r16 = regs->regs[16];
core->ti_mips->gpregs->r17 = regs->regs[17];
core->ti_mips->gpregs->r18 = regs->regs[18];
core->ti_mips->gpregs->r19 = regs->regs[19];
core->ti_mips->gpregs->r20 = regs->regs[20];
core->ti_mips->gpregs->r21 = regs->regs[21];
core->ti_mips->gpregs->r22 = regs->regs[22];
core->ti_mips->gpregs->r23 = regs->regs[23];
core->ti_mips->gpregs->r24 = regs->regs[24];
core->ti_mips->gpregs->r25 = regs->regs[25];
core->ti_mips->gpregs->r26 = regs->regs[26];
core->ti_mips->gpregs->r27 = regs->regs[27];
core->ti_mips->gpregs->r28 = regs->regs[28];
core->ti_mips->gpregs->r29 = regs->regs[29];
core->ti_mips->gpregs->r30 = regs->regs[30];
core->ti_mips->gpregs->r31 = regs->regs[31];
/* Save the MIPS CPU state */
core->ti_mips->gpregs->r0 = regs->regs[0];
core->ti_mips->gpregs->r1 = regs->regs[1];
core->ti_mips->gpregs->r2 = regs->regs[2];
core->ti_mips->gpregs->r3 = regs->regs[3];
core->ti_mips->gpregs->r4 = regs->regs[4];
core->ti_mips->gpregs->r5 = regs->regs[5];
core->ti_mips->gpregs->r6 = regs->regs[6];
core->ti_mips->gpregs->r7 = regs->regs[7];
core->ti_mips->gpregs->r8 = regs->regs[8];
core->ti_mips->gpregs->r9 = regs->regs[9];
core->ti_mips->gpregs->r10 = regs->regs[10];
core->ti_mips->gpregs->r11 = regs->regs[11];
core->ti_mips->gpregs->r12 = regs->regs[12];
core->ti_mips->gpregs->r13 = regs->regs[13];
core->ti_mips->gpregs->r14 = regs->regs[14];
core->ti_mips->gpregs->r15 = regs->regs[15];
core->ti_mips->gpregs->r16 = regs->regs[16];
core->ti_mips->gpregs->r17 = regs->regs[17];
core->ti_mips->gpregs->r18 = regs->regs[18];
core->ti_mips->gpregs->r19 = regs->regs[19];
core->ti_mips->gpregs->r20 = regs->regs[20];
core->ti_mips->gpregs->r21 = regs->regs[21];
core->ti_mips->gpregs->r22 = regs->regs[22];
core->ti_mips->gpregs->r23 = regs->regs[23];
core->ti_mips->gpregs->r24 = regs->regs[24];
core->ti_mips->gpregs->r25 = regs->regs[25];
core->ti_mips->gpregs->r26 = regs->regs[26];
core->ti_mips->gpregs->r27 = regs->regs[27];
core->ti_mips->gpregs->r28 = regs->regs[28];
core->ti_mips->gpregs->r29 = regs->regs[29];
core->ti_mips->gpregs->r30 = regs->regs[30];
core->ti_mips->gpregs->r31 = regs->regs[31];
core->ti_mips->gpregs->lo = regs->lo;
core->ti_mips->gpregs->hi = regs->hi;
core->ti_mips->gpregs->cp0_epc = regs->cp0_epc;
core->ti_mips->gpregs->cp0_badvaddr = regs->cp0_badvaddr;
core->ti_mips->gpregs->cp0_status = regs->cp0_status;
core->ti_mips->gpregs->cp0_cause = regs->cp0_cause;
core->ti_mips->gpregs->lo = regs->lo;
core->ti_mips->gpregs->hi = regs->hi;
core->ti_mips->gpregs->cp0_epc = regs->cp0_epc;
core->ti_mips->gpregs->cp0_badvaddr = regs->cp0_badvaddr;
core->ti_mips->gpregs->cp0_status = regs->cp0_status;
core->ti_mips->gpregs->cp0_cause = regs->cp0_cause;
core->ti_mips->fpregs->r0 = fpregs->regs[0];
core->ti_mips->fpregs->r1 = fpregs->regs[1];
core->ti_mips->fpregs->r2 = fpregs->regs[2];
core->ti_mips->fpregs->r3 = fpregs->regs[3];
core->ti_mips->fpregs->r4 = fpregs->regs[4];
core->ti_mips->fpregs->r5 = fpregs->regs[5];
core->ti_mips->fpregs->r6 = fpregs->regs[6];
core->ti_mips->fpregs->r7 = fpregs->regs[7];
core->ti_mips->fpregs->r8 = fpregs->regs[8];
core->ti_mips->fpregs->r9 = fpregs->regs[9];
core->ti_mips->fpregs->r10 = fpregs->regs[10];
core->ti_mips->fpregs->r11 = fpregs->regs[11];
core->ti_mips->fpregs->r12 = fpregs->regs[12];
core->ti_mips->fpregs->r13 = fpregs->regs[13];
core->ti_mips->fpregs->r14 = fpregs->regs[14];
core->ti_mips->fpregs->r15 = fpregs->regs[15];
core->ti_mips->fpregs->r16 = fpregs->regs[16];
core->ti_mips->fpregs->r17 = fpregs->regs[17];
core->ti_mips->fpregs->r18 = fpregs->regs[18];
core->ti_mips->fpregs->r19 = fpregs->regs[19];
core->ti_mips->fpregs->r20 = fpregs->regs[20];
core->ti_mips->fpregs->r21 = fpregs->regs[21];
core->ti_mips->fpregs->r22 = fpregs->regs[22];
core->ti_mips->fpregs->r23 = fpregs->regs[23];
core->ti_mips->fpregs->r24 = fpregs->regs[24];
core->ti_mips->fpregs->r25 = fpregs->regs[25];
core->ti_mips->fpregs->r26 = fpregs->regs[26];
core->ti_mips->fpregs->r27 = fpregs->regs[27];
core->ti_mips->fpregs->r28 = fpregs->regs[28];
core->ti_mips->fpregs->r29 = fpregs->regs[29];
core->ti_mips->fpregs->r30 = fpregs->regs[30];
core->ti_mips->fpregs->r31 = fpregs->regs[31];
core->ti_mips->fpregs->fpu_fcr31 = fpregs->fpu_fcr31;
core->ti_mips->fpregs->fpu_id = fpregs->fpu_id;
core->ti_mips->fpregs->r0 = fpregs->regs[0];
core->ti_mips->fpregs->r1 = fpregs->regs[1];
core->ti_mips->fpregs->r2 = fpregs->regs[2];
core->ti_mips->fpregs->r3 = fpregs->regs[3];
core->ti_mips->fpregs->r4 = fpregs->regs[4];
core->ti_mips->fpregs->r5 = fpregs->regs[5];
core->ti_mips->fpregs->r6 = fpregs->regs[6];
core->ti_mips->fpregs->r7 = fpregs->regs[7];
core->ti_mips->fpregs->r8 = fpregs->regs[8];
core->ti_mips->fpregs->r9 = fpregs->regs[9];
core->ti_mips->fpregs->r10 = fpregs->regs[10];
core->ti_mips->fpregs->r11 = fpregs->regs[11];
core->ti_mips->fpregs->r12 = fpregs->regs[12];
core->ti_mips->fpregs->r13 = fpregs->regs[13];
core->ti_mips->fpregs->r14 = fpregs->regs[14];
core->ti_mips->fpregs->r15 = fpregs->regs[15];
core->ti_mips->fpregs->r16 = fpregs->regs[16];
core->ti_mips->fpregs->r17 = fpregs->regs[17];
core->ti_mips->fpregs->r18 = fpregs->regs[18];
core->ti_mips->fpregs->r19 = fpregs->regs[19];
core->ti_mips->fpregs->r20 = fpregs->regs[20];
core->ti_mips->fpregs->r21 = fpregs->regs[21];
core->ti_mips->fpregs->r22 = fpregs->regs[22];
core->ti_mips->fpregs->r23 = fpregs->regs[23];
core->ti_mips->fpregs->r24 = fpregs->regs[24];
core->ti_mips->fpregs->r25 = fpregs->regs[25];
core->ti_mips->fpregs->r26 = fpregs->regs[26];
core->ti_mips->fpregs->r27 = fpregs->regs[27];
core->ti_mips->fpregs->r28 = fpregs->regs[28];
core->ti_mips->fpregs->r29 = fpregs->regs[29];
core->ti_mips->fpregs->r30 = fpregs->regs[30];
core->ti_mips->fpregs->r31 = fpregs->regs[31];
core->ti_mips->fpregs->fpu_fcr31 = fpregs->fpu_fcr31;
core->ti_mips->fpregs->fpu_id = fpregs->fpu_id;
return 0;
return 0;
}
int arch_alloc_thread_info(CoreEntry *core)
{
ThreadInfoMips *ti_mips;
UserMipsRegsEntry *gpregs;
UserMipsFpregsEntry *fpregs;
ThreadInfoMips *ti_mips;
UserMipsRegsEntry *gpregs;
UserMipsFpregsEntry *fpregs;
ti_mips = xmalloc(sizeof(*ti_mips));
if (!ti_mips)
goto err;
ti_mips = xmalloc(sizeof(*ti_mips));
if (!ti_mips)
goto err;
thread_info_mips__init(ti_mips);
core->ti_mips = ti_mips;
thread_info_mips__init(ti_mips);
core->ti_mips = ti_mips;
gpregs = xmalloc(sizeof(*gpregs));
if (!gpregs){
xfree(ti_mips);
goto err;
}
gpregs = xmalloc(sizeof(*gpregs));
if (!gpregs) {
xfree(ti_mips);
goto err;
}
user_mips_regs_entry__init(gpregs);
ti_mips->gpregs = gpregs;
user_mips_regs_entry__init(gpregs);
ti_mips->gpregs = gpregs;
fpregs = xmalloc(sizeof(*fpregs));
if (!fpregs){
xfree(ti_mips);
xfree(gpregs);
goto err;
}
fpregs = xmalloc(sizeof(*fpregs));
if (!fpregs) {
xfree(ti_mips);
xfree(gpregs);
goto err;
}
user_mips_fpregs_entry__init(fpregs);
ti_mips->fpregs = fpregs;
user_mips_fpregs_entry__init(fpregs);
ti_mips->fpregs = fpregs;
return 0;
return 0;
err:
return -1;
return -1;
}
void arch_free_thread_info(CoreEntry *core)
{
if (!core->ti_mips)
return;
if (!core->ti_mips)
return;
if (core->ti_mips->gpregs)
xfree(core->ti_mips->gpregs);
if (core->ti_mips->gpregs)
xfree(core->ti_mips->gpregs);
if (core->ti_mips->fpregs)
xfree(core->ti_mips->fpregs);
if (core->ti_mips->fpregs)
xfree(core->ti_mips->fpregs);
xfree(core->ti_mips);
xfree(core->ti_mips);
}
int restore_fpu(struct rt_sigframe *sigframe, CoreEntry *core)
{
struct rt_sigframe *f = sigframe;
UserMipsFpregsEntry *r = core->ti_mips->fpregs;
struct rt_sigframe *f = sigframe;
UserMipsFpregsEntry *r = core->ti_mips->fpregs;
f->rs_uc.uc_mcontext.sc_fpregs[0] = r->r0;
f->rs_uc.uc_mcontext.sc_fpregs[1] = r->r1;
f->rs_uc.uc_mcontext.sc_fpregs[2] = r->r2;
f->rs_uc.uc_mcontext.sc_fpregs[3] = r->r3;
f->rs_uc.uc_mcontext.sc_fpregs[4] = r->r4;
f->rs_uc.uc_mcontext.sc_fpregs[5] = r->r5;
f->rs_uc.uc_mcontext.sc_fpregs[6] = r->r6;
f->rs_uc.uc_mcontext.sc_fpregs[7] = r->r7;
f->rs_uc.uc_mcontext.sc_fpregs[8] = r->r8;
f->rs_uc.uc_mcontext.sc_fpregs[9] = r->r9;
f->rs_uc.uc_mcontext.sc_fpregs[10] = r->r10;
f->rs_uc.uc_mcontext.sc_fpregs[11] = r->r11;
f->rs_uc.uc_mcontext.sc_fpregs[12] = r->r12;
f->rs_uc.uc_mcontext.sc_fpregs[13] = r->r13;
f->rs_uc.uc_mcontext.sc_fpregs[14] = r->r14;
f->rs_uc.uc_mcontext.sc_fpregs[15] = r->r15;
f->rs_uc.uc_mcontext.sc_fpregs[16] = r->r16;
f->rs_uc.uc_mcontext.sc_fpregs[17] = r->r17;
f->rs_uc.uc_mcontext.sc_fpregs[18] = r->r18;
f->rs_uc.uc_mcontext.sc_fpregs[19] = r->r19;
f->rs_uc.uc_mcontext.sc_fpregs[20] = r->r20;
f->rs_uc.uc_mcontext.sc_fpregs[21] = r->r21;
f->rs_uc.uc_mcontext.sc_fpregs[22] = r->r22;
f->rs_uc.uc_mcontext.sc_fpregs[23] = r->r23;
f->rs_uc.uc_mcontext.sc_fpregs[24] = r->r24;
f->rs_uc.uc_mcontext.sc_fpregs[25] = r->r25;
f->rs_uc.uc_mcontext.sc_fpregs[26] = r->r26;
f->rs_uc.uc_mcontext.sc_fpregs[27] = r->r27;
f->rs_uc.uc_mcontext.sc_fpregs[28] = r->r28;
f->rs_uc.uc_mcontext.sc_fpregs[29] = r->r29;
f->rs_uc.uc_mcontext.sc_fpregs[30] = r->r30;
f->rs_uc.uc_mcontext.sc_fpregs[31] = r->r31;
f->rs_uc.uc_mcontext.sc_fpregs[0] = r->r0;
f->rs_uc.uc_mcontext.sc_fpregs[1] = r->r1;
f->rs_uc.uc_mcontext.sc_fpregs[2] = r->r2;
f->rs_uc.uc_mcontext.sc_fpregs[3] = r->r3;
f->rs_uc.uc_mcontext.sc_fpregs[4] = r->r4;
f->rs_uc.uc_mcontext.sc_fpregs[5] = r->r5;
f->rs_uc.uc_mcontext.sc_fpregs[6] = r->r6;
f->rs_uc.uc_mcontext.sc_fpregs[7] = r->r7;
f->rs_uc.uc_mcontext.sc_fpregs[8] = r->r8;
f->rs_uc.uc_mcontext.sc_fpregs[9] = r->r9;
f->rs_uc.uc_mcontext.sc_fpregs[10] = r->r10;
f->rs_uc.uc_mcontext.sc_fpregs[11] = r->r11;
f->rs_uc.uc_mcontext.sc_fpregs[12] = r->r12;
f->rs_uc.uc_mcontext.sc_fpregs[13] = r->r13;
f->rs_uc.uc_mcontext.sc_fpregs[14] = r->r14;
f->rs_uc.uc_mcontext.sc_fpregs[15] = r->r15;
f->rs_uc.uc_mcontext.sc_fpregs[16] = r->r16;
f->rs_uc.uc_mcontext.sc_fpregs[17] = r->r17;
f->rs_uc.uc_mcontext.sc_fpregs[18] = r->r18;
f->rs_uc.uc_mcontext.sc_fpregs[19] = r->r19;
f->rs_uc.uc_mcontext.sc_fpregs[20] = r->r20;
f->rs_uc.uc_mcontext.sc_fpregs[21] = r->r21;
f->rs_uc.uc_mcontext.sc_fpregs[22] = r->r22;
f->rs_uc.uc_mcontext.sc_fpregs[23] = r->r23;
f->rs_uc.uc_mcontext.sc_fpregs[24] = r->r24;
f->rs_uc.uc_mcontext.sc_fpregs[25] = r->r25;
f->rs_uc.uc_mcontext.sc_fpregs[26] = r->r26;
f->rs_uc.uc_mcontext.sc_fpregs[27] = r->r27;
f->rs_uc.uc_mcontext.sc_fpregs[28] = r->r28;
f->rs_uc.uc_mcontext.sc_fpregs[29] = r->r29;
f->rs_uc.uc_mcontext.sc_fpregs[30] = r->r30;
f->rs_uc.uc_mcontext.sc_fpregs[31] = r->r31;
return 0;
return 0;
}
int restore_gpregs(struct rt_sigframe *f, UserMipsRegsEntry *r)
{
f->rs_uc.uc_mcontext.sc_regs[0] = r->r0;
f->rs_uc.uc_mcontext.sc_regs[1] = r->r1;
f->rs_uc.uc_mcontext.sc_regs[2] = r->r2;
f->rs_uc.uc_mcontext.sc_regs[3] = r->r3;
f->rs_uc.uc_mcontext.sc_regs[4] = r->r4;
f->rs_uc.uc_mcontext.sc_regs[5] = r->r5;
f->rs_uc.uc_mcontext.sc_regs[6] = r->r6;
f->rs_uc.uc_mcontext.sc_regs[7] = r->r7;
f->rs_uc.uc_mcontext.sc_regs[8] = r->r8;
f->rs_uc.uc_mcontext.sc_regs[9] = r->r9;
f->rs_uc.uc_mcontext.sc_regs[10] = r->r10;
f->rs_uc.uc_mcontext.sc_regs[11] = r->r11;
f->rs_uc.uc_mcontext.sc_regs[12] = r->r12;
f->rs_uc.uc_mcontext.sc_regs[13] = r->r13;
f->rs_uc.uc_mcontext.sc_regs[14] = r->r14;
f->rs_uc.uc_mcontext.sc_regs[15] = r->r15;
f->rs_uc.uc_mcontext.sc_regs[16] = r->r16;
f->rs_uc.uc_mcontext.sc_regs[17] = r->r17;
f->rs_uc.uc_mcontext.sc_regs[18] = r->r18;
f->rs_uc.uc_mcontext.sc_regs[19] = r->r19;
f->rs_uc.uc_mcontext.sc_regs[20] = r->r20;
f->rs_uc.uc_mcontext.sc_regs[21] = r->r21;
f->rs_uc.uc_mcontext.sc_regs[22] = r->r22;
f->rs_uc.uc_mcontext.sc_regs[23] = r->r23;
f->rs_uc.uc_mcontext.sc_regs[24] = r->r24;
f->rs_uc.uc_mcontext.sc_regs[25] = r->r25;
f->rs_uc.uc_mcontext.sc_regs[26] = r->r26;
f->rs_uc.uc_mcontext.sc_regs[27] = r->r27;
f->rs_uc.uc_mcontext.sc_regs[28] = r->r28;
f->rs_uc.uc_mcontext.sc_regs[29] = r->r29;
f->rs_uc.uc_mcontext.sc_regs[30] = r->r30;
f->rs_uc.uc_mcontext.sc_regs[31] = r->r31;
f->rs_uc.uc_mcontext.sc_regs[0] = r->r0;
f->rs_uc.uc_mcontext.sc_regs[1] = r->r1;
f->rs_uc.uc_mcontext.sc_regs[2] = r->r2;
f->rs_uc.uc_mcontext.sc_regs[3] = r->r3;
f->rs_uc.uc_mcontext.sc_regs[4] = r->r4;
f->rs_uc.uc_mcontext.sc_regs[5] = r->r5;
f->rs_uc.uc_mcontext.sc_regs[6] = r->r6;
f->rs_uc.uc_mcontext.sc_regs[7] = r->r7;
f->rs_uc.uc_mcontext.sc_regs[8] = r->r8;
f->rs_uc.uc_mcontext.sc_regs[9] = r->r9;
f->rs_uc.uc_mcontext.sc_regs[10] = r->r10;
f->rs_uc.uc_mcontext.sc_regs[11] = r->r11;
f->rs_uc.uc_mcontext.sc_regs[12] = r->r12;
f->rs_uc.uc_mcontext.sc_regs[13] = r->r13;
f->rs_uc.uc_mcontext.sc_regs[14] = r->r14;
f->rs_uc.uc_mcontext.sc_regs[15] = r->r15;
f->rs_uc.uc_mcontext.sc_regs[16] = r->r16;
f->rs_uc.uc_mcontext.sc_regs[17] = r->r17;
f->rs_uc.uc_mcontext.sc_regs[18] = r->r18;
f->rs_uc.uc_mcontext.sc_regs[19] = r->r19;
f->rs_uc.uc_mcontext.sc_regs[20] = r->r20;
f->rs_uc.uc_mcontext.sc_regs[21] = r->r21;
f->rs_uc.uc_mcontext.sc_regs[22] = r->r22;
f->rs_uc.uc_mcontext.sc_regs[23] = r->r23;
f->rs_uc.uc_mcontext.sc_regs[24] = r->r24;
f->rs_uc.uc_mcontext.sc_regs[25] = r->r25;
f->rs_uc.uc_mcontext.sc_regs[26] = r->r26;
f->rs_uc.uc_mcontext.sc_regs[27] = r->r27;
f->rs_uc.uc_mcontext.sc_regs[28] = r->r28;
f->rs_uc.uc_mcontext.sc_regs[29] = r->r29;
f->rs_uc.uc_mcontext.sc_regs[30] = r->r30;
f->rs_uc.uc_mcontext.sc_regs[31] = r->r31;
f->rs_uc.uc_mcontext.sc_mdlo = r->lo;
f->rs_uc.uc_mcontext.sc_mdhi = r->hi;
f->rs_uc.uc_mcontext.sc_pc = r->cp0_epc;
f->rs_uc.uc_mcontext.sc_mdlo = r->lo;
f->rs_uc.uc_mcontext.sc_mdhi = r->hi;
f->rs_uc.uc_mcontext.sc_pc = r->cp0_epc;
return 0;
return 0;
}
int get_task_futex_robust_list_compat(pid_t pid, ThreadCoreEntry *info)
{
return 0;
return 0;
}

0
criu/arch/mips/include/asm/dump.h Executable file → Normal file
View file

0
criu/arch/mips/include/asm/int.h Executable file → Normal file
View file

0
criu/arch/mips/include/asm/parasite-syscall.h Executable file → Normal file
View file

2
criu/arch/mips/include/asm/parasite.h Executable file → Normal file
View file

@ -3,7 +3,7 @@
static inline void arch_get_tls(tls_t *ptls)
{
asm("rdhwr %0, $29" : "=r"(*ptls));
asm("rdhwr %0, $29" : "=r"(*ptls));
}
#endif

23
criu/arch/mips/include/asm/restore.h Executable file → Normal file
View file

@ -4,19 +4,18 @@
#include "asm/restorer.h"
#include "images/core.pb-c.h"
#define JUMP_TO_RESTORER_BLOB(new_sp, restore_task_exec_start, \
task_args) \
#define JUMP_TO_RESTORER_BLOB(new_sp, restore_task_exec_start, task_args) \
asm volatile( \
"move $4, %0 \n" \
"move $25, %1 \n" \
"move $5, %2 \n" \
"move $29, $5 \n" \
"jalr $25 \n" \
"nop \n" \
: \
:"r"(task_args),"r"(restore_task_exec_start), \
"g"(new_sp) \
: "$29", "$25", "$4","$5")
"move $4, %0 \n" \
"move $25, %1 \n" \
"move $5, %2 \n" \
"move $29, $5 \n" \
"jalr $25 \n" \
"nop \n" \
: \
:"r"(task_args),"r"(restore_task_exec_start), \
"g"(new_sp) \
: "$29", "$25", "$4","$5")
static inline void core_get_tls(CoreEntry *pcore, tls_t *ptls)
{

0
criu/arch/mips/include/asm/restorer.h Executable file → Normal file
View file

0
criu/arch/mips/include/asm/syscall32.h Executable file → Normal file
View file

0
criu/arch/mips/include/asm/types.h Executable file → Normal file
View file

0
criu/arch/mips/include/asm/vdso.h Executable file → Normal file
View file

2
criu/arch/mips/restorer.c Executable file → Normal file
View file

@ -13,7 +13,7 @@
int restore_nonsigframe_gpregs(UserMipsRegsEntry *r)
{
return 0;
return 0;
}
#define SHMLBA 0x40000

2
criu/arch/mips/sigaction_compat.c Executable file → Normal file
View file

@ -14,6 +14,6 @@ extern char restore_rt_sigaction;
int arch_compat_rt_sigaction(void *stack32, int sig, rt_sigaction_t_compat *act)
{
return 0;
return 0;
}

2
criu/arch/mips/sigframe.c Executable file → Normal file
View file

@ -9,5 +9,5 @@
int sigreturn_prep_fpu_frame(struct rt_sigframe *sigframe,
struct rt_sigframe *rsigframe)
{
return 0;
return 0;
}

0
criu/arch/mips/vdso-pie.c Executable file → Normal file
View file

4
criu/crtools.c
View file

@ -214,8 +214,8 @@ int main(int argc, char *argv[], char *envp[])
return 1;
}
if (fault_injected(FI_CANNOT_MAP_VDSO))
kdat.can_map_vdso = 0;
if (fault_injected(FI_CANNOT_MAP_VDSO))
kdat.can_map_vdso = 0;
if (!list_empty(&opts.inherit_fds)) {
if (strcmp(argv[optind], "restore")) {